Merge pull request #1465 from YosysHQ/dave/ice40_timing_sim
[yosys.git] / passes / pmgen /
2019-10-27 Clifford WolfMerge pull request #1393 from whitequark/write_verilog...
2019-10-22 Clifford WolfMerge pull request #1452 from nakengelhardt/fix_dsp_mem_reg
2019-10-19 Miodrag MilanovićMerge pull request #1457 from xobs/python-binary-name
2019-10-19 Sean CrossMakefile: don't assume python is called `python3`
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/efinix
2019-10-18 Miodrag MilanovićMerge branch 'master' into mmicko/anlogic
2019-10-18 Miodrag MilanovićMerge branch 'master' into eddie/pr1352
2019-10-16 Clifford WolfMerge pull request #1450 from YosysHQ/clifford/fixdffmux
2019-10-16 Clifford WolfFix dffmux peepopt init handling
2019-10-16 Clifford WolfMove GENERATE_PATTERN macro to separate utility header
2019-10-16 Clifford WolfDisable left-over log_debug in peepopt_dffmux.pmg
2019-10-14 Clifford WolfUse "(id)" instead of "id" for types as temporary hack
2019-10-08 Eddie HungMerge pull request #1432 from YosysHQ/eddie/fix1427
2019-10-08 Eddie HungMerge pull request #1433 from YosysHQ/eddie/equiv_opt_a...
2019-10-08 Eddie HungMerge pull request #1437 from YosysHQ/eddie/abc_to_abc9
2019-10-08 Eddie HungMerge pull request #1438 from YosysHQ/eddie/xilinx_dsp_...
2019-10-06 Clifford WolfMerge pull request #1439 from YosysHQ/eddie/fix_ice40_w...
2019-10-05 Eddie HungMissing 'accept' at end of ice40_wrapcarry, spotted...
2019-10-05 Clifford WolfUpdate README.md
2019-10-05 Eddie HungMissed this
2019-10-05 Eddie HungAdd comment on why we have to match for clock-enable...
2019-10-05 Eddie HungAdd note on pattern detector
2019-10-05 Miodrag MilanovićMerge pull request #1436 from YosysHQ/mmicko/msvc_fix
2019-10-05 Eddie HungAdd comments for xilinx_dsp_cascade
2019-10-05 Eddie HungImprove comments for xilinx_dsp_CREG
2019-10-05 Eddie HungFix comment
2019-10-05 Eddie HungRestore optimisation for sigM.empty()
2019-10-05 Eddie HungRetry on fixing TODOs
2019-10-05 Eddie HungRevert "Fix TODOs"
2019-10-05 Eddie HungMore comments, cleanup
2019-10-05 Eddie HungFix TODOs
2019-10-05 Eddie HungConsistency
2019-10-05 Eddie HungAdd comments for xilinx_dsp
2019-10-05 Eddie HungMerge branch 'master' into eddie/abc_to_abc9
2019-10-04 Eddie HungFix xilinx_dsp for unsigned extensions
2019-10-04 Miodrag MilanovicFixes for MSVC build
2019-10-03 Eddie HungFix broken CI, check reset even for constants, trim...
2019-10-03 Eddie HungMerge branch 'eddie/fix_sat_init' into eddie/fix1427
2019-10-03 Eddie HungRefactor peepopt_dffmux and be sensitive to \init when...
2019-10-01 SergeyMerge branch 'master' into SergeyDegtyar/efinix
2019-10-01 SergeyMerge branch 'master' into SergeyDegtyar/anlogic
2019-09-30 Eddie HungMerge branch 'SergeyDegtyar/ecp5' of https://github...
2019-09-30 whitequarkMerge pull request #1406 from whitequark/connect_rpc
2019-09-30 Eddie HungMerge pull request #1397 from btut/fix/python_wrappers_...
2019-09-30 Miodrag MilanovićMerge pull request #1416 from YosysHQ/mmicko/frontend_b...
2019-09-30 Clifford WolfMerge pull request #1412 from YosysHQ/eddie/equiv_opt_a...
2019-09-30 Eddie HungMerge pull request #1414 from hzeller/improve-replace...
2019-09-29 Eddie HungMerge pull request #1359 from YosysHQ/xc7dsp
2019-09-27 Eddie HungOoops AREG and BREG to default to -1
2019-09-27 Aman GoelMerge pull request #7 from YosysHQ/master
2019-09-26 Eddie HungUpdate doc with max cascade chain of 20
2019-09-26 Eddie HungDo not always zero out C (e.g. during cascade breaks)
2019-09-26 Eddie HungUpdate doc
2019-09-26 Eddie HungZero out ports
2019-09-26 Eddie Hungxilinx_dsp_cascade to also cascade AREG and BREG
2019-09-26 Eddie HungTry recursive pmgen for P cascade
2019-09-26 Eddie HungCREG to check for \keep
2019-09-26 Eddie HungRemove newline
2019-09-26 Eddie HungDo not die if DSP48E1.P has no users (would otherwise...
2019-09-26 Eddie HungReject if (* init *) present
2019-09-26 Eddie HungRework xilinx_dsp postAdd for new wreduce call
2019-09-25 Eddie HungFix memory issue since SigSpec& could be invalidated
2019-09-25 Eddie HungMerge pull request #1401 from SergeyDegtyar/SergeyDegty...
2019-09-25 Eddie Hungunextend only used in init
2019-09-25 Eddie HungCall 'wreduce' after mul2dsp to avoid unextend()
2019-09-23 Eddie HungSet [AB]CASCREG to legal values
2019-09-23 Eddie HungComment to explain separating CREG packing
2019-09-23 Eddie HungSeparate out CREG packing into new pattern, to avoid...
2019-09-23 Eddie HungMove log_debug("\n") later
2019-09-23 Eddie HungMove unextend initialisation later
2019-09-23 Eddie HungUse new port() overload once more
2019-09-23 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-09-20 Eddie HungUse new port/param overload in pmg
2019-09-20 Eddie HungOutput pattern matcher items as log_debug()
2019-09-20 Eddie HungOPMODE is port not param
2019-09-20 Eddie HungMerge remote-tracking branch 'origin/master' into xc7dsp
2019-09-20 Eddie HungDo not run xilinx_dsp_cascadeAB for now
2019-09-20 Eddie HungWIP for xiinx_dsp_cascadeAB
2019-09-20 Eddie HungRun until convergence
2019-09-20 Eddie HungCleanup ice40_dsp.pmg
2019-09-20 Eddie HungCleanup xilinx_dsp
2019-09-20 Eddie HungMore exceptions
2019-09-20 Eddie HungUpdate doc
2019-09-20 Eddie HungAdd a xilinx_dsp_cascade matcher for PCIN -> PCOUT
2019-09-20 Eddie HungAdd an overload for port/param with default value
2019-09-20 Eddie HungSmall cleanup
2019-09-20 Eddie HungDisable support for SB_MAC16 reset since it is async
2019-09-20 Eddie HungSB_MAC16 ffCD to not pack same as ffO
2019-09-20 Eddie HungClarify
2019-09-20 Eddie HungUpdate doc for ice40_dsp
2019-09-20 Eddie HungAdd an index
2019-09-20 Eddie HungFix width of D
2019-09-19 Eddie HungUse ID() macro
2019-09-19 Eddie HungMerge remote-tracking branch 'origin/clifford/fix1381...
2019-09-19 Eddie HungRe-enable sign extension for C input
2019-09-19 Eddie HungDo not perform width-checks for DSP48E1 which is much...
2019-09-19 Eddie HungRemove TODO as check should not be necessary
2019-09-19 Eddie HungRevert index to select
2019-09-19 Eddie HungCleanup xilinx_dsp too
2019-09-19 Eddie HungRefactor ce{mux,pol} -> hold{mux,pol}
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