projects
/
yosys.git
/ history
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
first ⋅ prev ⋅ next
Initial adaptation of muxpack from shregmap
[yosys.git]
/
passes
/
sat
/
expose.cc
2019-05-21
Jim Lawson
Merge remote-tracking branch 'upstream/master'
blob
|
commitdiff
|
raw
2019-05-08
Clifford Wolf
Merge pull request #991 from kristofferkoch/gcc9-warnings
blob
|
commitdiff
|
raw
2019-05-06
Clifford Wolf
Merge pull request #946 from YosysHQ/clifford/specify
blob
|
commitdiff
|
raw
2019-05-06
Clifford Wolf
Merge pull request #871 from YosysHQ/verific_import
blob
|
commitdiff
|
raw
2019-05-06
Clifford Wolf
Merge branch 'master' of github.com:YosysHQ/yosys into...
blob
|
commitdiff
|
raw
2019-05-06
Clifford Wolf
Merge pull request #992 from bwidawsk/bison-fix
blob
|
commitdiff
|
raw
2019-05-06
Clifford Wolf
Merge pull request #989 from YosysHQ/dave/abc_name_improve
blob
|
commitdiff
|
raw
2019-05-06
Clifford Wolf
Fix bug in "expose -input"
blob
|
commitdiff
|
raw
2019-03-28
Benedikt Tutzer
Merge remote-tracking branch 'origin/master' into featu...
blob
|
commitdiff
|
raw
|
diff to current
2018-09-17
Udi Finkelstein
Merge branch 'master' into pr_reg_wire_error
blob
|
commitdiff
|
raw
|
diff to current
2018-08-22
Jim Lawson
Merge pull request #1 from YosysHQ/master
blob
|
commitdiff
|
raw
|
diff to current
2018-08-18
Aman Goel
Merge pull request #3 from YosysHQ/master
blob
|
commitdiff
|
raw
|
diff to current
2018-08-15
Clifford Wolf
Merge pull request #573 from cr1901/msys-64
blob
|
commitdiff
|
raw
|
diff to current
2018-08-15
Clifford Wolf
Merge pull request #591 from hzeller/virtual-override
blob
|
commitdiff
|
raw
|
diff to current
2018-08-15
Clifford Wolf
Merge pull request #513 from udif/pr_reg_wire_error
blob
|
commitdiff
|
raw
|
diff to current
2018-07-21
Henner Zeller
Consistent use of 'override' for virtual methods in...
blob
|
commitdiff
|
raw
|
diff to current
2018-03-12
Clifford Wolf
Add "expose -input"
blob
|
commitdiff
|
raw
|
diff to current
2016-07-08
Clifford Wolf
Merge branch 'yosys-0.5-vtr' of https://github.com...
blob
|
commitdiff
|
raw
|
diff to current
2016-04-23
Andrew Zonenberg
Merge https://github.com/cliffordwolf/yosys
blob
|
commitdiff
|
raw
|
diff to current
2016-04-21
Clifford Wolf
Added "yosys -D" feature
blob
|
commitdiff
|
raw
|
diff to current
2015-12-07
Clifford Wolf
Merge pull request #108 from cseed/master
blob
|
commitdiff
|
raw
|
diff to current
2015-10-24
Clifford Wolf
renamed SigSpec::to_single_sigbit() to SigSpec::as_bit...
blob
|
commitdiff
|
raw
|
diff to current
2015-08-14
Clifford Wolf
Spell check (by Larry Doolittle)
blob
|
commitdiff
|
raw
|
diff to current
2015-07-02
Clifford Wolf
Fixed trailing whitespaces
blob
|
commitdiff
|
raw
|
diff to current
2015-04-03
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
blob
|
commitdiff
|
raw
|
diff to current
2014-12-24
Clifford Wolf
Renamed extend() to extend_xx(), changed most users...
blob
|
commitdiff
|
raw
|
diff to current
2014-09-27
Clifford Wolf
namespace Yosys
blob
|
commitdiff
|
raw
|
diff to current
2014-09-22
Ahmed Irfan
Merge branch 'master' of https://github.com/cliffordwol...
blob
|
commitdiff
|
raw
|
diff to current
2014-08-02
Clifford Wolf
Removed at() method from RTLIL::IdString
blob
|
commitdiff
|
raw
|
diff to current
2014-08-02
Clifford Wolf
More cleanups related to RTLIL::IdString usage
blob
|
commitdiff
|
raw
|
diff to current
2014-07-31
Clifford Wolf
Renamed port access function on RTLIL::Cell, added...
blob
|
commitdiff
|
raw
|
diff to current
2014-07-27
Clifford Wolf
Refactoring: Renamed RTLIL::Design::modules to modules_
blob
|
commitdiff
|
raw
|
diff to current
2014-07-26
Clifford Wolf
Refactoring: Renamed RTLIL::Module::cells to cells_
blob
|
commitdiff
|
raw
|
diff to current
2014-07-26
Clifford Wolf
Refactoring: Renamed RTLIL::Module::wires to wires_
blob
|
commitdiff
|
raw
|
diff to current
2014-07-26
Clifford Wolf
Changed more code to the new RTLIL::Wire constructors
blob
|
commitdiff
|
raw
|
diff to current
2014-07-26
Clifford Wolf
More RTLIL::Cell API usage cleanups
blob
|
commitdiff
|
raw
|
diff to current
2014-07-26
Clifford Wolf
Added RTLIL::Cell::has(portname)
blob
|
commitdiff
|
raw
|
diff to current
2014-07-26
Clifford Wolf
Merge automatic and manual code changes for new cell...
blob
|
commitdiff
|
raw
|
diff to current
2014-07-26
Clifford Wolf
Manual fixes for new cell connections API
blob
|
commitdiff
|
raw
|
diff to current
2014-07-26
Clifford Wolf
Changed users of cell->connections_ to the new API...
blob
|
commitdiff
|
raw
|
diff to current
2014-07-26
Clifford Wolf
Renamed RTLIL::{Module,Cell}::connections to connections_
blob
|
commitdiff
|
raw
|
diff to current
2014-07-25
Clifford Wolf
Use only module->addCell() and module->remove() to...
blob
|
commitdiff
|
raw
|
diff to current
2014-07-22
Clifford Wolf
SigSpec refactoring: using the accessor functions every...
blob
|
commitdiff
|
raw
|
diff to current
2014-07-22
Clifford Wolf
SigSpec refactoring: renamed chunks and width to __chun...
blob
|
commitdiff
|
raw
|
diff to current
2014-05-29
Clifford Wolf
Merge pull request #36 from hansiglaser/master
blob
|
commitdiff
|
raw
|
diff to current
2014-05-28
Johann Glaser
added log_header to miter and expose pass, show cell...
blob
|
commitdiff
|
raw
|
diff to current
2014-02-09
Clifford Wolf
Various improvements in expose command (added -sep...
blob
|
commitdiff
|
raw
|
diff to current
2014-02-08
Clifford Wolf
Fixed handling of async reset in expose -evert-dff
blob
|
commitdiff
|
raw
|
diff to current
2014-02-08
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
blob
|
commitdiff
|
raw
|
diff to current
2014-02-08
Clifford Wolf
Implemented expose -evert-dff
blob
|
commitdiff
|
raw
|
diff to current
2014-02-06
Clifford Wolf
Added expose -dff
blob
|
commitdiff
|
raw
|
diff to current
2014-02-05
Clifford Wolf
Added expose command
blob
|
commitdiff
|
raw
|
diff to current