2017-05-28 |
Clifford Wolf | Add "setundef -anyseq" |
tree | commitdiff |
2016-10-19 |
Andrew Zonenberg | Merge https://github.com/cliffordwolf/yosys |
tree | commitdiff |
2016-10-17 |
Clifford Wolf | Bugfix in "miter -assert" handling of assumptions |
tree | commitdiff |
2016-10-17 |
Clifford Wolf | Added clk2fflogic support for $dffsr and $dlatch |
tree | commitdiff |
2016-10-16 |
Clifford Wolf | Improvements and bugfixes in clk2fflogic |
tree | commitdiff |
2016-10-14 |
Clifford Wolf | Some minor build fixes for Visual C |
tree | commitdiff |
2016-10-14 |
Clifford Wolf | Added clk2fflogic |
tree | commitdiff |
2016-10-11 |
Clifford Wolf | Added $ff and $_FF_ cell types |
tree | commitdiff |
2016-09-07 |
Clifford Wolf | Improvements in assertpmux |
tree | commitdiff |
2016-09-06 |
Clifford Wolf | Added assertpmux |
tree | commitdiff |
2016-09-06 |
Clifford Wolf | Run log_flush() before solving in sat command |
tree | commitdiff |
2016-07-24 |
Clifford Wolf | Moved SatHelper::setup_init() code to SatHelper::setup() |
tree | commitdiff |
2016-07-23 |
Clifford Wolf | Added $initstate support to "sat" command |
tree | commitdiff |
2016-07-08 |
Clifford Wolf | Merge branch 'yosys-0.5-vtr' of https://github.com... |
tree | commitdiff |
2016-04-23 |
Andrew Zonenberg | Merge https://github.com/cliffordwolf/yosys |
tree | commitdiff |
2016-04-21 |
Clifford Wolf | Added "yosys -D" feature |
tree | commitdiff |
2016-04-07 |
Andrew Zonenberg | Merge https://github.com/cliffordwolf/yosys |
tree | commitdiff |
2016-04-05 |
Clifford Wolf | Improved formatting of "sat" output tables |
tree | commitdiff |
2016-04-01 |
Andrew Zonenberg | Merge https://github.com/cliffordwolf/yosys |
tree | commitdiff |
2016-03-31 |
Clifford Wolf | Renamed opt_const to opt_expr |
tree | commitdiff |
2015-12-07 |
Clifford Wolf | Merge pull request #108 from cseed/master |
tree | commitdiff |
2015-10-25 |
Clifford Wolf | Import more std:: stuff into Yosys namespace |
tree | commitdiff |
2015-10-24 |
Clifford Wolf | renamed SigSpec::to_single_sigbit() to SigSpec::as_bit... |
tree | commitdiff |
2015-08-18 |
Clifford Wolf | Added sat -show-regs, -show-public, -show-all |
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2015-08-14 |
Clifford Wolf | Re-created command-reference-manual.tex, copied some... |
tree | commitdiff |
2015-08-14 |
Clifford Wolf | Spell check (by Larry Doolittle) |
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2015-07-25 |
Clifford Wolf | Added "miter -assert" |
tree | commitdiff |
2015-07-02 |
Clifford Wolf | Fixed trailing whitespaces |
tree | commitdiff |
2015-06-30 |
Clifford Wolf | Added logic-loop error handling to freduce |
tree | commitdiff |
2015-04-18 |
Clifford Wolf | don't consider blackbox modules in "sat" command |
tree | commitdiff |
2015-04-03 |
Ahmed Irfan | Merge branch 'master' of https://github.com/cliffordwol... |
tree | commitdiff |
2015-02-26 |
Clifford Wolf | Added non-std verilog assume() statement |
tree | commitdiff |
2015-02-22 |
Clifford Wolf | Fixed "sat -initsteps" off-by-one bug |
tree | commitdiff |
2015-02-21 |
Clifford Wolf | Added "sat -stepsize" and "sat -tempinduct-step" |
tree | commitdiff |
2015-02-21 |
Clifford Wolf | sat docu change |
tree | commitdiff |
2015-02-21 |
Clifford Wolf | When "sat -tempinduct-baseonly -maxsteps N" reaches... |
tree | commitdiff |
2015-02-21 |
Clifford Wolf | Added "sat -tempinduct-baseonly -tempinduct-inductonly" |
tree | commitdiff |
2015-02-21 |
Clifford Wolf | Fixed basecase init for "sat -tempinduct" |
tree | commitdiff |
2015-02-21 |
Clifford Wolf | Replaced ezDefaultSAT with ezSatPtr |
tree | commitdiff |
2015-02-19 |
Clifford Wolf | format fixes in "sat -dump_json" |
tree | commitdiff |
2015-02-19 |
Clifford Wolf | Added "sat -dump_json" (WaveJSON format) |
tree | commitdiff |
2015-01-27 |
Clifford Wolf | Improved an error message |
tree | commitdiff |
2015-01-27 |
Clifford Wolf | Added "sat -show-ports" |
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2015-01-22 |
Clifford Wolf | Moved equiv stuff to passes/equiv/ |
tree | commitdiff |
2015-01-21 |
Clifford Wolf | Progress in equiv_simple |
tree | commitdiff |
2015-01-19 |
Clifford Wolf | Added equiv_simple |
tree | commitdiff |
2015-01-19 |
Clifford Wolf | Added equiv_status |
tree | commitdiff |
2015-01-19 |
Clifford Wolf | Added equiv_make command |
tree | commitdiff |
2014-12-24 |
Clifford Wolf | Renamed extend() to extend_xx(), changed most users... |
tree | commitdiff |
2014-11-09 |
Clifford Wolf | Added log_warning() API |
tree | commitdiff |
2014-10-10 |
Clifford Wolf | Renamed TRUE/FALSE to CONST_TRUE/CONST_FALSE because... |
tree | commitdiff |
2014-10-10 |
Clifford Wolf | Renamed SIZE() to GetSize() because of name collision... |
tree | commitdiff |
2014-09-27 |
Clifford Wolf | namespace Yosys |
tree | commitdiff |
2014-09-22 |
Ahmed Irfan | Merge branch 'master' of https://github.com/cliffordwol... |
tree | commitdiff |
2014-09-06 |
Clifford Wolf | Merge branch 'master' of github.com:cliffordwolf/yosys |
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2014-09-06 |
Clifford Wolf | Merge pull request #38 from rubund/master |
tree | commitdiff |
2014-09-06 |
Ruben Undheim | Corrected spelling mistakes found by lintian |
tree | commitdiff |
2014-09-01 |
Clifford Wolf | Fixes in old SAT example.ys |
tree | commitdiff |
2014-09-01 |
Clifford Wolf | Moved "share" and "wreduce" to passes/opt/ |
tree | commitdiff |
2014-08-24 |
Clifford Wolf | azonenberg: Make dump_vcd save model when temporal... |
tree | commitdiff |
2014-08-15 |
Clifford Wolf | Renamed $_INV_ cell type to $_NOT_ |
tree | commitdiff |
2014-08-09 |
Clifford Wolf | Fixed "share" for complex scenarios with never-active... |
tree | commitdiff |
2014-08-09 |
Clifford Wolf | Do not share any $reduce_* cells (its complicated and... |
tree | commitdiff |
2014-08-08 |
Clifford Wolf | Fixed sharing of reduce operator |
tree | commitdiff |
2014-08-08 |
Clifford Wolf | Added "sat -prove-skip" |
tree | commitdiff |
2014-08-07 |
Clifford Wolf | Use "-keepdc" in "miter -equiv -flatten" |
tree | commitdiff |
2014-08-03 |
Clifford Wolf | Fixed "share" for memory read ports |
tree | commitdiff |
2014-08-02 |
Clifford Wolf | Removed at() method from RTLIL::IdString |
tree | commitdiff |
2014-08-02 |
Clifford Wolf | More bugfixes related to new RTLIL::IdString |
tree | commitdiff |
2014-08-02 |
Clifford Wolf | More cleanups related to RTLIL::IdString usage |
tree | commitdiff |
2014-07-31 |
Clifford Wolf | Renamed modwalker.h to modtools.h |
tree | commitdiff |
2014-07-31 |
Clifford Wolf | Renamed port access function on RTLIL::Cell, added... |
tree | commitdiff |
2014-07-31 |
Clifford Wolf | Added module->design and cell->module, wire->module... |
tree | commitdiff |
2014-07-28 |
Clifford Wolf | Using log_assert() instead of assert() |
tree | commitdiff |
2014-07-27 |
Clifford Wolf | Refactoring: Renamed RTLIL::Design::modules to modules_ |
tree | commitdiff |
2014-07-26 |
Clifford Wolf | Refactoring: Renamed RTLIL::Module::cells to cells_ |
tree | commitdiff |
2014-07-26 |
Clifford Wolf | Refactoring: Renamed RTLIL::Module::wires to wires_ |
tree | commitdiff |
2014-07-26 |
Clifford Wolf | Changed more code to the new RTLIL::Wire constructors |
tree | commitdiff |
2014-07-26 |
Clifford Wolf | Changed a lot of code to the new RTLIL::Wire constructors |
tree | commitdiff |
2014-07-26 |
Clifford Wolf | More RTLIL::Cell API usage cleanups |
tree | commitdiff |
2014-07-26 |
Clifford Wolf | Added RTLIL::Cell::has(portname) |
tree | commitdiff |
2014-07-26 |
Clifford Wolf | Merge automatic and manual code changes for new cell... |
tree | commitdiff |
2014-07-26 |
Clifford Wolf | Manual fixes for new cell connections API |
tree | commitdiff |
2014-07-26 |
Clifford Wolf | Changed users of cell->connections_ to the new API... |
tree | commitdiff |
2014-07-26 |
Clifford Wolf | Renamed RTLIL::{Module,Cell}::connections to connections_ |
tree | commitdiff |
2014-07-25 |
Clifford Wolf | Use only module->addCell() and module->remove() to... |
tree | commitdiff |
2014-07-23 |
Clifford Wolf | Removed RTLIL::SigSpec::optimize() |
tree | commitdiff |
2014-07-23 |
Clifford Wolf | Removed RTLIL::SigSpec::expand() method |
tree | commitdiff |
2014-07-23 |
Clifford Wolf | Fixed all users of SigSpec::chunks_rw() and removed it |
tree | commitdiff |
2014-07-23 |
Clifford Wolf | Merge branch: Refactoring {SigSpec|SigChunk}(RTLIL... |
tree | commitdiff |
2014-07-23 |
Clifford Wolf | Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ... |
tree | commitdiff |
2014-07-23 |
Clifford Wolf | Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ... |
tree | commitdiff |
2014-07-23 |
Clifford Wolf | Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ... |
tree | commitdiff |
2014-07-22 |
Clifford Wolf | SigSpec refactoring: change RTLIL::SigSpec::chunks... |
tree | commitdiff |
2014-07-22 |
Clifford Wolf | SigSpec refactoring: using the accessor functions every... |
tree | commitdiff |
2014-07-22 |
Clifford Wolf | SigSpec refactoring: renamed chunks and width to __chun... |
tree | commitdiff |
2014-07-21 |
Clifford Wolf | Removed deprecated module->new_wire() |
tree | commitdiff |
2014-07-21 |
Clifford Wolf | Wider range of cell types supported in "share" pass |
tree | commitdiff |
2014-07-21 |
Clifford Wolf | Use ezSAT::non_incremental() in "share" pass |
tree | commitdiff |
2014-07-20 |
Clifford Wolf | Added support for resource sharing in mux control logic |
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