git.libre-soc.org Git - yosys.git/history - passes/techmap/iopadmap.cc

[yosys.git] / passes / techmap / iopadmap.cc

2019-03-28	Benedikt Tutzer	Merge remote-tracking branch 'origin/master' into featu...	blob \| commitdiff \| raw
2018-09-17	Udi Finkelstein	Merge branch 'master' into pr_reg_wire_error	blob \| commitdiff \| raw
2018-08-22	Jim Lawson	Merge pull request #1 from YosysHQ/master	blob \| commitdiff \| raw
2018-08-18	Aman Goel	Merge pull request #3 from YosysHQ/master	blob \| commitdiff \| raw
2018-08-15	Clifford Wolf	Merge pull request #573 from cr1901/msys-64	blob \| commitdiff \| raw
2018-08-15	Clifford Wolf	Merge pull request #591 from hzeller/virtual-override	blob \| commitdiff \| raw
2018-08-15	Clifford Wolf	Merge pull request #513 from udif/pr_reg_wire_error	blob \| commitdiff \| raw \| diff to current
2018-07-21	Henner Zeller	Consistent use of 'override' for virtual methods in...	blob \| commitdiff \| raw
2018-07-04	Aman Goel	Merge branch 'YosysHQ-master'	blob \| commitdiff \| raw \| diff to current
2018-07-04	Aman Goel	Merging with official repo	blob \| commitdiff \| raw \| diff to current
2018-05-15	Clifford Wolf	Fix iopadmap for loops between tristate IO buffers	blob \| commitdiff \| raw \| diff to current
2018-05-15	Clifford Wolf	Fix iopadmap for cases where IO pins already have buffe...	blob \| commitdiff \| raw \| diff to current
2016-08-08	Clifford Wolf	Undo "preserve wire attributes in iopadmap" change...	blob \| commitdiff \| raw \| diff to current
2016-08-06	Clifford Wolf	preserve wire attributes in iopadmap	blob \| commitdiff \| raw \| diff to current
2016-07-08	Clifford Wolf	Merge branch 'yosys-0.5-vtr' of https://github.com...	blob \| commitdiff \| raw \| diff to current
2016-05-04	Clifford Wolf	Added tristate buffer support to iopadmap	blob \| commitdiff \| raw \| diff to current
2016-05-04	Andrew Zonenberg	Merge https://github.com/cliffordwolf/yosys	blob \| commitdiff \| raw \| diff to current
2016-05-04	Clifford Wolf	Merge branch 'master' of github.com:cliffordwolf/yosys	blob \| commitdiff \| raw \| diff to current
2016-05-04	Clifford Wolf	Fixed iopadmap attribute handling	blob \| commitdiff \| raw \| diff to current
2016-04-23	Andrew Zonenberg	Merge https://github.com/cliffordwolf/yosys	blob \| commitdiff \| raw \| diff to current
2016-04-21	Clifford Wolf	Added "yosys -D" feature	blob \| commitdiff \| raw \| diff to current
2015-12-07	Clifford Wolf	Merge pull request #108 from cseed/master	blob \| commitdiff \| raw \| diff to current
2015-08-31	Clifford Wolf	Fixed iopadmap help message	blob \| commitdiff \| raw \| diff to current
2015-07-02	Clifford Wolf	Fixed trailing whitespaces	blob \| commitdiff \| raw \| diff to current
2015-04-03	Ahmed Irfan	Merge branch 'master' of https://github.com/cliffordwol...	blob \| commitdiff \| raw \| diff to current
2015-02-25	Clifford Wolf	Merge branch 'master' of github.com:cliffordwolf/yosys	blob \| commitdiff \| raw \| diff to current
2015-02-25	Clifford Wolf	Bugfix in iopadmap	blob \| commitdiff \| raw \| diff to current
2015-01-06	Clifford Wolf	Various small improvements to synth_xilinx	blob \| commitdiff \| raw \| diff to current
2014-09-27	Clifford Wolf	namespace Yosys	blob \| commitdiff \| raw \| diff to current
2014-09-22	Ahmed Irfan	Merge branch 'master' of https://github.com/cliffordwol...	blob \| commitdiff \| raw \| diff to current
2014-08-15	Clifford Wolf	Bugfix in iopadmap	blob \| commitdiff \| raw \| diff to current
2014-07-31	Clifford Wolf	Renamed port access function on RTLIL::Cell, added...	blob \| commitdiff \| raw \| diff to current
2014-07-27	Clifford Wolf	Refactoring: Renamed RTLIL::Design::modules to modules_	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Refactoring: Renamed RTLIL::Module::wires to wires_	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Changed more code to the new RTLIL::Wire constructors	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Merge automatic and manual code changes for new cell...	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Manual fixes for new cell connections API	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Changed users of cell->connections_ to the new API...	blob \| commitdiff \| raw \| diff to current
2014-07-26	Clifford Wolf	Renamed RTLIL::{Module,Cell}::connections to connections_	blob \| commitdiff \| raw \| diff to current
2014-07-25	Clifford Wolf	Use only module->addCell() and module->remove() to...	blob \| commitdiff \| raw \| diff to current
2014-07-23	Clifford Wolf	Merge branch: Refactoring {SigSpec\|SigChunk}(RTLIL...	blob \| commitdiff \| raw \| diff to current
2014-07-23	Clifford Wolf	Refactoring {SigSpec\|SigChunk}(RTLIL::Wire *wire, ...	blob \| commitdiff \| raw \| diff to current
2014-07-23	Clifford Wolf	Refactoring {SigSpec\|SigChunk}(RTLIL::Wire *wire, ...	blob \| commitdiff \| raw \| diff to current
2014-07-17	Clifford Wolf	Added support for "blackbox" attribute to iopadmap	blob \| commitdiff \| raw \| diff to current
2014-02-15	Clifford Wolf	Added iopadmap -bits	blob \| commitdiff \| raw \| diff to current
2013-10-26	Clifford Wolf	Added support for i/o buffers to iopadmap	blob \| commitdiff \| raw \| diff to current
2013-10-24	Clifford Wolf	Fixed handling of boolean attributes (passes)	blob \| commitdiff \| raw \| diff to current
2013-10-16	Clifford Wolf	Added iopadmap pass	blob \| commitdiff \| raw \| diff to current

RSS Atom