Improved TopoSort determinism
[yosys.git] / passes / techmap / techmap.cc
2014-11-07 Clifford WolfImproved TopoSort determinism
2014-10-10 Clifford WolfAdded format __attribute__ to stringf()
2014-10-10 Clifford WolfRenamed SIZE() to GetSize() because of name collision...
2014-09-27 Clifford Wolfnamespace Yosys
2014-09-22 Ahmed IrfanMerge branch 'master' of https://github.com/cliffordwol...
2014-09-14 Clifford WolfFixed techmap_wrap for techmap_celltype
2014-09-14 Clifford WolfAdded techmap_wrap attribute
2014-09-07 Clifford WolfAdded 'techmap_maccmap' techmap attribute
2014-09-01 Clifford WolfAdded "techmap -autoproc"
2014-08-23 Clifford WolfOnly call proc_share_dirname() in techmap when necessary
2014-08-23 Clifford WolfChanged frontend-api from FILE to std::istream
2014-08-16 Clifford WolfRenamed toposort.h to utils.h
2014-08-15 Clifford WolfMore idstring sort_by_* helpers and fixed tpl ordering...
2014-08-15 Clifford Wolfdocument "techmap -map %<design-name>"
2014-08-03 Clifford WolfImplemented recursive techmap
2014-08-02 Clifford WolfImplemented simplemap support for "techmap -extern"
2014-08-02 Clifford WolfBugfix in "techmap -extern"
2014-08-02 Clifford WolfNo implicit conversion from IdString to anything else
2014-08-02 Clifford WolfMore bugfixes related to new RTLIL::IdString
2014-08-02 Clifford WolfMore cleanups related to RTLIL::IdString usage
2014-08-01 Clifford WolfReplaced sha1 implementation
2014-07-31 Clifford WolfMoved some stuff to kernel/yosys.{h,cc}, using Yosys...
2014-07-31 Clifford WolfRenamed "stdcells.v" to "techmap.v"
2014-07-31 Clifford WolfAdded "techmap -assert"
2014-07-30 Clifford WolfAdded techmap CONSTMAP feature
2014-07-29 Clifford WolfAdded "techmap -map %{design-name}"
2014-07-28 Clifford WolfUsing log_assert() instead of assert()
2014-07-27 Clifford WolfAdded techmap -extern
2014-07-27 Clifford WolfAdded topological sorting to techmap
2014-07-27 Clifford WolfUsing new obj iterator API in a few places
2014-07-27 Clifford WolfRefactoring: Renamed RTLIL::Design::modules to modules_
2014-07-26 Clifford WolfRefactoring: Renamed RTLIL::Module::cells to cells_
2014-07-26 Clifford WolfRefactoring: Renamed RTLIL::Module::wires to wires_
2014-07-26 Clifford WolfChanged more code to the new RTLIL::Wire constructors
2014-07-26 Clifford WolfMerge automatic and manual code changes for new cell...
2014-07-26 Clifford WolfManual fixes for new cell connections API
2014-07-26 Clifford WolfChanged users of cell->connections_ to the new API...
2014-07-26 Clifford WolfRenamed RTLIL::{Module,Cell}::connections to connections_
2014-07-25 Clifford WolfAdded copy-constructor-like module->addCell(name, other...
2014-07-25 Clifford WolfUse only module->addCell() and module->remove() to...
2014-07-23 Clifford WolfFixed all users of SigSpec::chunks_rw() and removed it
2014-07-22 Clifford WolfSigSpec refactoring: change RTLIL::SigSpec::chunks...
2014-07-22 Clifford WolfSigSpec refactoring: using the accessor functions every...
2014-07-22 Clifford WolfSigSpec refactoring: renamed chunks and width to __chun...
2014-07-20 Clifford WolfAdded call_on_selection() and call_on_module() API
2014-07-17 Clifford WolfAdded support for "blackbox" attribute to flatten/techmap
2014-05-29 Clifford WolfMerge pull request #36 from hansiglaser/master
2014-05-26 Johann Glaserbe more verbose when techmap yielded processes
2014-03-13 Clifford WolfMerge branch 'master' of https://github.com/Siesh1oo...
2014-03-13 Clifford WolfMerged OSX fixes from Siesh1oo with some modifications
2014-03-12 Siesh1oo - kernel/register.h, kernel/driver.cc: refactor rewrit...
2014-03-12 Siesh1oo - kernel/register.h, kernel/driver.cc: refactor rewrit...
2014-03-06 Clifford WolfAdded techmap -max_iter option
2014-02-20 Clifford WolfAdded _TECHMAP_REPLACE_ feature to techmap
2014-02-18 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2014-02-18 Clifford WolfAdded techmap support for _TECHMAP_CONNMAP_*_
2014-02-17 Clifford WolfBetter preserve wires when flattening (in comparison...
2014-02-16 Clifford WolfAdded some additional checks to techmap
2014-02-16 Clifford WolfAdded CONSTMSK and CONSTVAL feature to techmap
2014-02-16 Clifford WolfAdded recursion support to techmap
2014-02-06 Clifford WolfChanged techmap description from "simple" to "generic"
2013-12-04 Clifford WolfReplaced signed_parameters API with CONST_FLAG_SIGNED
2013-12-04 Clifford WolfReplaced RTLIL::Const::str with generic decoder method
2013-11-24 Clifford WolfUsing simplemap mappers from techmap
2013-11-24 Clifford WolfAdded module->avail_parameters (for advanced techmap...
2013-11-24 Clifford WolfAdded techmap -D and -I options
2013-11-24 Clifford WolfAdded "techmap -share_map" option
2013-11-24 Clifford WolfImplemented correct handling of signed module parameters
2013-11-24 Clifford WolfFixed "flatten" top-module detection: Only use on fully...
2013-11-24 Clifford WolfAdded "top" attribute to mark top module in hierarchy
2013-11-23 Clifford WolfImproved handling of techmap special wires
2013-11-23 Clifford WolfAdded more generic _TECHMAP_ wire mechanism to techmap...
2013-11-10 Clifford WolfCall internal checker more often
2013-10-17 Clifford WolfImproved way of connecting ports in techmap pass
2013-08-09 Clifford WolfAdded techmap -opt mode
2013-05-26 Clifford WolfFixed techmap/flatten for positional module arguments
2013-05-23 Clifford WolfAdded missing newline to some error messages
2013-05-16 Clifford WolfMerge branch 'bugfix'
2013-04-27 Clifford WolfAdded support for const cell inputs in techmap
2013-04-26 Clifford WolfAdded "flatten" pass
2013-03-28 Clifford WolfAdded proper TECHMAP_FAIL support and added support...
2013-03-18 Clifford WolfMerge branch 'hansi'
2013-03-18 Johann Glaserfixed typos
2013-03-08 Clifford WolfAutomatically select new objects in abc and techmap...
2013-02-28 Clifford WolfAdded more help messages
2013-01-05 Clifford Wolfinitial import