| 2018-01-07 |
Clifford Wolf | Add support for "yosys -E" |
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| 2017-09-01 |
Clifford Wolf | Merge branch 'master' of github.com:cliffordwolf/yosys |
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| 2017-09-01 |
Clifford Wolf | Merge branch 'ChipScan-master' |
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| 2017-08-31 |
Jason Lowdermilk | updated to use get_src_attribute() and set_src_attribute(). |
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| 2017-08-30 |
Jason Lowdermilk | Merge remote-tracking branch 'upstream/master' |
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| 2017-08-29 |
Jason Lowdermilk | Add support for source line tracking through synthesis... |
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| 2017-07-21 |
Clifford Wolf | Fix handling of empty cell port assignments (i.e. ignor... |
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| 2017-02-16 |
Andrew Zonenberg | Merge https://github.com/cliffordwolf/yosys |
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| 2017-02-16 |
Clifford Wolf | Copy attributes to _TECHMAP_REPLACE_ cells |
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| 2017-02-14 |
Andrew Zonenberg | Merge https://github.com/cliffordwolf/yosys |
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| 2017-02-13 |
Clifford Wolf | Fix techmap for inout ports connected to inout ports |
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| 2016-10-16 |
Clifford Wolf | Build fixes for VS 2015 |
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| 2016-10-14 |
Clifford Wolf | Added MEMID handling to "flatten" pass |
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| 2016-09-17 |
Clifford Wolf | Merge branch 'master' of github.com:cliffordwolf/yosys |
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| 2016-09-14 |
Clifford Wolf | Bugfix in techmap parameter handling |
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| 2016-07-08 |
Clifford Wolf | Merge branch 'yosys-0.5-vtr' of https://github.com... |
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| 2016-05-06 |
Clifford Wolf | Fixed preservation of important attributes in techmap |
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| 2016-04-23 |
Andrew Zonenberg | Merge https://github.com/cliffordwolf/yosys |
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| 2016-04-21 |
Clifford Wolf | Added "yosys -D" feature |
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| 2016-02-13 |
Clifford Wolf | Fixed some visual studio warnings |
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| 2015-12-07 |
Clifford Wolf | Merge pull request #108 from cseed/master |
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| 2015-10-24 |
Clifford Wolf | equiv_purge bugfix, using SigChunk in Yosys namespace |
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| 2015-10-13 |
Clifford Wolf | Merge branch 'master' of https://github.com/rubund... |
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| 2015-10-13 |
Clifford Wolf | Fixed "flatten" for unconnected inout ports |
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| 2015-08-14 |
Larry Doolittle | Another block of spelling fixes |
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| 2015-08-14 |
Clifford Wolf | Spell check (by Larry Doolittle) |
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| 2015-07-30 |
Clifford Wolf | Fixed flatten $meminit handling |
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| 2015-07-18 |
Clifford Wolf | Fixed techmap processes error msg |
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| 2015-07-02 |
Clifford Wolf | Fixed trailing whitespaces |
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| 2015-05-23 |
Clifford Wolf | Improved "flatten" handlings of inout ports |
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| 2015-04-24 |
Clifford Wolf | Improved attributes API and handling of "src" attributes |
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| 2015-04-09 |
Clifford Wolf | techmap code cleanup |
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| 2015-04-08 |
Clifford Wolf | Added support for "file names with blanks" |
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| 2015-04-08 |
Clifford Wolf | Removed "techmap -share_map" (use "-map +/filename... |
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| 2015-04-03 |
Ahmed Irfan | Merge branch 'master' of https://github.com/cliffordwol... |
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| 2015-02-25 |
Clifford Wolf | Merge branch 'master' of github.com:cliffordwolf/yosys |
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| 2015-02-25 |
Clifford Wolf | Added "keep_hierarchy" attribute |
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| 2015-02-21 |
Clifford Wolf | Fixed "flatten" for non-pre-derived modules |
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| 2015-02-21 |
Clifford Wolf | Catch constants assigned to cell outputs in "flatten" |
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| 2015-01-17 |
Clifford Wolf | Added support for memories to flatten (techmap) |
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| 2015-01-15 |
Clifford Wolf | Fixed handling of foo.__TECHMAP_... |
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| 2014-12-26 |
Clifford Wolf | Added Yosys::{dict,nodict,vector} container types |
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| 2014-12-24 |
Clifford Wolf | Improvements in simplemap api, added $ne $nex $eq ... |
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| 2014-11-07 |
Clifford Wolf | Improved TopoSort determinism |
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| 2014-10-10 |
Clifford Wolf | Added format __attribute__ to stringf() |
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| 2014-10-10 |
Clifford Wolf | Renamed SIZE() to GetSize() because of name collision... |
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| 2014-09-27 |
Clifford Wolf | namespace Yosys |
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| 2014-09-22 |
Ahmed Irfan | Merge branch 'master' of https://github.com/cliffordwol... |
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| 2014-09-14 |
Clifford Wolf | Fixed techmap_wrap for techmap_celltype |
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| 2014-09-14 |
Clifford Wolf | Added techmap_wrap attribute |
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| 2014-09-07 |
Clifford Wolf | Added 'techmap_maccmap' techmap attribute |
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| 2014-09-01 |
Clifford Wolf | Added "techmap -autoproc" |
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| 2014-08-23 |
Clifford Wolf | Only call proc_share_dirname() in techmap when necessary |
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| 2014-08-23 |
Clifford Wolf | Changed frontend-api from FILE to std::istream |
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| 2014-08-16 |
Clifford Wolf | Renamed toposort.h to utils.h |
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| 2014-08-15 |
Clifford Wolf | More idstring sort_by_* helpers and fixed tpl ordering... |
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| 2014-08-15 |
Clifford Wolf | document "techmap -map %<design-name>" |
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| 2014-08-03 |
Clifford Wolf | Implemented recursive techmap |
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| 2014-08-02 |
Clifford Wolf | Implemented simplemap support for "techmap -extern" |
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| 2014-08-02 |
Clifford Wolf | Bugfix in "techmap -extern" |
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| 2014-08-02 |
Clifford Wolf | No implicit conversion from IdString to anything else |
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| 2014-08-02 |
Clifford Wolf | More bugfixes related to new RTLIL::IdString |
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| 2014-08-02 |
Clifford Wolf | More cleanups related to RTLIL::IdString usage |
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| 2014-08-01 |
Clifford Wolf | Replaced sha1 implementation |
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| 2014-07-31 |
Clifford Wolf | Moved some stuff to kernel/yosys.{h,cc}, using Yosys... |
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| 2014-07-31 |
Clifford Wolf | Renamed "stdcells.v" to "techmap.v" |
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| 2014-07-31 |
Clifford Wolf | Added "techmap -assert" |
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| 2014-07-30 |
Clifford Wolf | Added techmap CONSTMAP feature |
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| 2014-07-29 |
Clifford Wolf | Added "techmap -map %{design-name}" |
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| 2014-07-28 |
Clifford Wolf | Using log_assert() instead of assert() |
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| 2014-07-27 |
Clifford Wolf | Added techmap -extern |
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| 2014-07-27 |
Clifford Wolf | Added topological sorting to techmap |
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| 2014-07-27 |
Clifford Wolf | Using new obj iterator API in a few places |
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| 2014-07-27 |
Clifford Wolf | Refactoring: Renamed RTLIL::Design::modules to modules_ |
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| 2014-07-26 |
Clifford Wolf | Refactoring: Renamed RTLIL::Module::cells to cells_ |
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| 2014-07-26 |
Clifford Wolf | Refactoring: Renamed RTLIL::Module::wires to wires_ |
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| 2014-07-26 |
Clifford Wolf | Changed more code to the new RTLIL::Wire constructors |
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| 2014-07-26 |
Clifford Wolf | Merge automatic and manual code changes for new cell... |
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| 2014-07-26 |
Clifford Wolf | Manual fixes for new cell connections API |
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| 2014-07-26 |
Clifford Wolf | Changed users of cell->connections_ to the new API... |
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| 2014-07-26 |
Clifford Wolf | Renamed RTLIL::{Module,Cell}::connections to connections_ |
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| 2014-07-25 |
Clifford Wolf | Added copy-constructor-like module->addCell(name, other... |
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| 2014-07-25 |
Clifford Wolf | Use only module->addCell() and module->remove() to... |
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| 2014-07-23 |
Clifford Wolf | Fixed all users of SigSpec::chunks_rw() and removed it |
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| 2014-07-22 |
Clifford Wolf | SigSpec refactoring: change RTLIL::SigSpec::chunks... |
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| 2014-07-22 |
Clifford Wolf | SigSpec refactoring: using the accessor functions every... |
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| 2014-07-22 |
Clifford Wolf | SigSpec refactoring: renamed chunks and width to __chun... |
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| 2014-07-20 |
Clifford Wolf | Added call_on_selection() and call_on_module() API |
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| 2014-07-17 |
Clifford Wolf | Added support for "blackbox" attribute to flatten/techmap |
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| 2014-05-29 |
Clifford Wolf | Merge pull request #36 from hansiglaser/master |
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| 2014-05-26 |
Johann Glaser | be more verbose when techmap yielded processes |
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| 2014-03-13 |
Clifford Wolf | Merge branch 'master' of https://github.com/Siesh1oo... |
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| 2014-03-13 |
Clifford Wolf | Merged OSX fixes from Siesh1oo with some modifications |
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| 2014-03-12 |
Siesh1oo | - kernel/register.h, kernel/driver.cc: refactor rewrit... |
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| 2014-03-12 |
Siesh1oo | - kernel/register.h, kernel/driver.cc: refactor rewrit... |
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| 2014-03-06 |
Clifford Wolf | Added techmap -max_iter option |
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| 2014-02-20 |
Clifford Wolf | Added _TECHMAP_REPLACE_ feature to techmap |
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| 2014-02-18 |
Clifford Wolf | Merge branch 'master' of github.com:cliffordwolf/yosys |
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| 2014-02-18 |
Clifford Wolf | Added techmap support for _TECHMAP_CONNMAP_*_ |
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| 2014-02-17 |
Clifford Wolf | Better preserve wires when flattening (in comparison... |
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