Various improvements regarding logic loops in "share" results
[yosys.git] / passes / techmap /
2014-09-15 Clifford WolfMore aggressive $macc merging in alumacc
2014-09-15 Clifford WolfAdded the obvious optimizations to alumacc $macc generator
2014-09-15 Clifford WolfImproved maccmap tree bit packing
2014-09-14 Clifford WolfFixed techmap_wrap for techmap_celltype
2014-09-14 Clifford WolfVarious fixes/cleanups in alumacc and maccmap
2014-09-14 Clifford WolfAdded techmap_wrap attribute
2014-09-14 Clifford Wolfalumacc fix for $pos cells
2014-09-14 Clifford WolfExtract $alu cells in alumacc
2014-09-14 Clifford WolfMerge $macc cells in alumacc pass
2014-09-14 Clifford WolfBasic $macc extract in alumacc
2014-09-14 Clifford Wolfalumacc skeleton
2014-09-08 Clifford WolfAdded "$fa" cell type
2014-09-08 Clifford WolfTrim msb/lsb zero bits from full adder in maccmap
2014-09-07 Clifford WolfAdded 'techmap_maccmap' techmap attribute
2014-09-07 Clifford WolfAdded "maccmap" command
2014-09-04 Clifford WolfRemoved $bu0 cell type
2014-09-01 Clifford WolfAdded "techmap -autoproc"
2014-08-27 Clifford WolfFixed inserting of Q-inverters in dfflibmap
2014-08-23 Clifford WolfOnly call proc_share_dirname() in techmap when necessary
2014-08-23 Clifford WolfChanged frontend-api from FILE to std::istream
2014-08-23 Clifford WolfChanged backend-api from FILE to std::ostream
2014-08-16 Clifford WolfRenamed toposort.h to utils.h
2014-08-15 Clifford WolfBugfix in iopadmap
2014-08-15 Clifford WolfRenamed $_INV_ cell type to $_NOT_
2014-08-15 Clifford WolfMore idstring sort_by_* helpers and fixed tpl ordering...
2014-08-15 Clifford Wolfdocument "techmap -map %<design-name>"
2014-08-14 Clifford WolfAdded module->ports
2014-08-03 Clifford WolfImplemented recursive techmap
2014-08-02 Clifford WolfImplemented simplemap support for "techmap -extern"
2014-08-02 Clifford WolfBugfix in "techmap -extern"
2014-08-02 Clifford WolfNo implicit conversion from IdString to anything else
2014-08-02 Clifford WolfMore bugfixes related to new RTLIL::IdString
2014-08-02 Clifford WolfMore cleanups related to RTLIL::IdString usage
2014-08-01 Clifford WolfReplaced sha1 implementation
2014-07-31 Clifford WolfRenamed port access function on RTLIL::Cell, added...
2014-07-31 Clifford WolfAdded module->design and cell->module, wire->module...
2014-07-31 Clifford WolfMoved some stuff to kernel/yosys.{h,cc}, using Yosys...
2014-07-31 Clifford WolfRenamed "stdcells.v" to "techmap.v"
2014-07-31 Clifford WolfAdded "techmap -assert"
2014-07-30 Clifford WolfAdded techmap CONSTMAP feature
2014-07-29 Clifford WolfAdded "techmap -map %{design-name}"
2014-07-28 Clifford WolfUsing log_assert() instead of assert()
2014-07-27 Clifford WolfAdded techmap -extern
2014-07-27 Clifford WolfAdded topological sorting to techmap
2014-07-27 Clifford WolfUsing new obj iterator API in a few places
2014-07-27 Clifford WolfRefactoring: Renamed RTLIL::Design::modules to modules_
2014-07-26 Clifford WolfRefactoring: Renamed RTLIL::Module::cells to cells_
2014-07-26 Clifford WolfRefactoring: Renamed RTLIL::Module::wires to wires_
2014-07-26 Clifford WolfChanged more code to the new RTLIL::Wire constructors
2014-07-26 Clifford WolfMore RTLIL::Cell API usage cleanups
2014-07-26 Clifford WolfMerge automatic and manual code changes for new cell...
2014-07-26 Clifford WolfManual fixes for new cell connections API
2014-07-26 Clifford WolfChanged users of cell->connections_ to the new API...
2014-07-26 Clifford WolfRenamed RTLIL::{Module,Cell}::connections to connections_
2014-07-25 Clifford WolfAdded copy-constructor-like module->addCell(name, other...
2014-07-25 Clifford WolfUse only module->addCell() and module->remove() to...
2014-07-24 Clifford WolfAdded "make SMALL=1"
2014-07-24 Clifford WolfAdded "make PRETTY=1"
2014-07-23 Clifford WolfRemoved RTLIL::SigSpec::expand() method
2014-07-23 Clifford WolfFixed all users of SigSpec::chunks_rw() and removed it
2014-07-23 Clifford WolfMerge branch: Refactoring {SigSpec|SigChunk}(RTLIL...
2014-07-23 Clifford WolfRefactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ...
2014-07-23 Clifford WolfRefactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ...
2014-07-22 Clifford WolfSigSpec refactoring: change RTLIL::SigSpec::chunks...
2014-07-22 Clifford WolfSigSpec refactoring: using the accessor functions every...
2014-07-22 Clifford WolfSigSpec refactoring: renamed chunks and width to __chun...
2014-07-21 Clifford WolfReplaced depricated NEW_WIRE macro with module->addWire...
2014-07-21 Clifford WolfRemoved deprecated module->new_wire()
2014-07-20 Clifford WolfAdded call_on_selection() and call_on_module() API
2014-07-17 Clifford WolfAdded support for "blackbox" attribute to iopadmap
2014-07-17 Clifford WolfAdded support for "blackbox" attribute to flatten/techmap
2014-05-29 Clifford WolfMerge pull request #36 from hansiglaser/master
2014-05-26 Johann Glaserbe more verbose when techmap yielded processes
2014-03-13 Clifford WolfMerge branch 'master' of https://github.com/Siesh1oo...
2014-03-13 Clifford WolfMerged OSX fixes from Siesh1oo with some modifications
2014-03-12 Siesh1oo - kernel/register.h, kernel/driver.cc: refactor rewrit...
2014-03-12 Siesh1oo - kernel/register.h, kernel/driver.cc: refactor rewrit...
2014-03-11 Siesh1ooRebase to cliffordwolf repo HEAD finished.
2014-03-11 Clifford WolfOSX compatible creation of stdcells.inc, using code...
2014-03-11 Clifford WolfMerged a few fixes for non-posix systems from github...
2014-03-11 Siesh1oo - passes/techmap/Makefile.inc: POSIX 'od' has no ...
2014-03-10 Siesh1oo - passes/techmap/dfflibmap.cc, passes/fsm/fsm_recode...
2014-03-09 Clifford WolfFixed dumping of timing() { .. } block in libparse
2014-03-06 Clifford WolfAdded techmap -max_iter option
2014-02-20 Clifford WolfAdded _TECHMAP_REPLACE_ feature to techmap
2014-02-20 Clifford WolfAdded "extract -ignore_parameters" and "extract -ignore...
2014-02-20 Clifford WolfAdded "extract -map %<design_name>"
2014-02-18 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2014-02-18 Clifford WolfAdded techmap support for _TECHMAP_CONNMAP_*_
2014-02-17 Clifford WolfBetter preserve wires when flattening (in comparison...
2014-02-16 Clifford WolfAdded some additional checks to techmap
2014-02-16 Clifford WolfAdded CONSTMSK and CONSTVAL feature to techmap
2014-02-16 Clifford WolfAdded recursion support to techmap
2014-02-15 Clifford WolfAdded iopadmap -bits
2014-02-15 Clifford WolfFixed dfflibmap for cell libraries with no set-reset-ff
2014-02-08 Clifford WolfMoved some passes to other source directories
2014-02-07 Clifford WolfAdded $slice and $concat cell types
2014-02-06 Clifford WolfChanged techmap description from "simple" to "generic"
2014-01-26 Clifford WolfMerge branch 'btor' of https://github.com/ahmedirfan198...
2014-01-25 Clifford WolfAdded support for // comments in liberty parser
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