Hotfix in AIGER witness reader state machine
[yosys.git] / passes /
2022-02-28 Claire Xenia WolfHotfix in AIGER witness reader state machine
2022-02-27 Miodrag MilanovicSupport extended aiw format
2022-02-25 Miodrag MilanovicFix for last clock edge data
2022-02-25 Claire Xenia WolfExperimental sim changes
2022-02-22 Claire XenMerge pull request #3211 from YosysHQ/micko/witness
2022-02-22 Claire XenMerge pull request #3197 from YosysHQ/claire/smtbmcfix
2022-02-21 Miodrag MilanovićMerge pull request #3203 from YosysHQ/micko/sim_ff
2022-02-21 Miodrag MilanovicFix handling of ce_over_srst
2022-02-18 Claire Xenia WolfFix cycle 0 in aiger witness co-simulation
2022-02-18 Miodrag MilanovicAdded AIGER witness file co simulation
2022-02-18 Miodrag Milanovicsimplify logic of handling flip-flops and latches
2022-02-17 Miodrag MilanovicReview cleanup
2022-02-16 Miodrag MilanovicAdd support for various ff/latch cells simulation
2022-02-11 Claire XenMerge pull request #2376 from nmoroze/clk2ff-better...
2022-02-11 Miodrag MilanovićMerge pull request #3164 from zachjs/fix-ast-warn
2022-02-11 Claire XenMerge branch 'master' into clk2ff-better-names
2022-02-11 Claire XenMerge pull request #2019 from boqwxp/glift
2022-02-07 Miodrag MilanovićMerge pull request #3185 from YosysHQ/micko/co_sim
2022-02-04 Miodrag MilanovicError detection for co-simulation
2022-02-04 Miodrag Milanovicbug fix and cleanups
2022-02-02 Miodrag MilanovićMerge pull request #3182 from yrabbit/wip-doc2
2022-02-02 YRabbitCorrect a typo in the manual
2022-02-02 Miodrag Milanovicrespect hide_internal flag
2022-02-02 Miodrag Milanovicunify cycles counting and cleanup
2022-02-02 Miodrag Milanovicadded stimulus mode and param check
2022-02-02 Scott ThibaultUpdate comment
2022-02-02 Scott ThibaultFix unextend method for signed constants
2022-01-31 Miodrag Milanovicerror when no signal found
2022-01-31 Miodrag MilanovicCleanup
2022-01-31 Miodrag MilanovicCompare bits when not all are defined
2022-01-31 Miodrag MilanovicCleanup
2022-01-31 Miodrag Milanovicmessage update
2022-01-31 Miodrag MilanovicDisplay simulation time data
2022-01-31 Miodrag MilanovicUse edges when explicit
2022-01-31 Miodrag MilanovicUpdating initial state and checks
2022-01-31 Miodrag MilanovicFix scope
2022-01-30 Marcelina Kościelnickaopt_reduce: Add $bmux and $demux optimization patterns.
2022-01-28 Marcelina KościelnickaAdd $bmux and $demux cells.
2022-01-28 Miodrag Milanoviccheck if stop before start
2022-01-28 Miodrag Milanovicset initial state, only flip-flops
2022-01-28 Miodrag Milanovicignore not found private signals
2022-01-28 Miodrag Milanovicrecursive check
2022-01-28 Miodrag MilanovicDo actual compare
2022-01-28 Miodrag MilanovicAdd more options and time handling
2022-01-28 Marcelina Kościelnickaopt_dff: Don't mutate muxes while ModWalker is active.
2022-01-27 Marcelina Kościelnickamemory_bram: Make use of new mem emulation functions...
2022-01-26 Miodrag MilanovicDisplay values of outputs
2022-01-26 Miodrag MilanovicCheck if stimulated
2022-01-26 Miodrag MilanovicRead fst and use data to set inputs
2022-01-26 Miodrag MilanovicAdd ability to write to FST file
2022-01-19 Miodrag MilanovićMerge pull request #3120 from Icenowy/anlogic-bram
2022-01-17 N. EngelhardtMerge pull request #3145 from nakengelhardt/advertise_s...
2022-01-04 Austin Seippopt_dff: fix sequence point copy paste bug
2021-12-25 CatherineMerge pull request #3127 from whitequark/cxxrtl-no...
2021-12-20 Marcelina Kościelnickamemory_share: Fix SAT-based sharing for wide ports.
2021-12-16 CatherineMerge pull request #3115 from whitequark/issue-3112
2021-12-16 CatherineMerge pull request #3114 from whitequark/issue-3113
2021-12-15 Catherinebugpoint: avoid infinite loop between -connections...
2021-12-12 Marcelina KościelnickaAdd clean_zerowidth pass, use it for Verilog output.
2021-12-10 Miodrag MilanovićMerge pull request #3097 from YosysHQ/modport
2021-12-08 Marcelina Kościelnickaopt_mem_priority: Fix non-ascii char in help message.
2021-11-25 Loftysta: very crude static timing analysis pass
2021-11-12 Marcelina Kościelnickashow: Fix wire bit indexing.
2021-11-10 Claire XenMerge pull request #3075 from YosysHQ/micko/verific_mem...
2021-11-10 Claire XenMerge pull request #3077 from YosysHQ/claire/genlib
2021-11-10 Claire XenSpelling fix in abc.cc
2021-11-10 Claire Xenia WolfAdd genlib support to ABC command
2021-11-10 Marcelina Kościelnickaiopadmap: Fix ebmarassing typo
2021-11-09 Marcelina Kościelnickaiopadmap: Add native support for negative-polarity...
2021-11-06 Pepijn de Vosgowin: widelut support (#3042)
2021-11-05 Miodrag MilanovicMake it work on all
2021-11-05 Miodrag MilanovicCorrect way of setting maybe_unsused on labels
2021-11-05 Miodrag MilanovićMerge pull request #3067 from YosysHQ/aki/ci_update
2021-11-02 Marcelina Kościelnickaflatten: Keep sigmap around between flatten_cell invoca...
2021-10-27 Marcelina Kościelnickaproc_dff: Emit $aldff.
2021-10-27 Marcelina Kościelnickadfflegalize: Refactor, add aldff support.
2021-10-26 Zachary Snowverilog: use derived module info to elaborate cell...
2021-10-26 Rupert SwarbrickSplit out logic for reprocessing an AstModule
2021-10-21 Marcelina KościelnickaChange implicit conversions from bool to Sig* to explicit.
2021-10-21 Marcelina Kościelnickaextract_reduce: Refactor and fix input signal construction.
2021-10-19 Miodrag MilanovićMerge pull request #3045 from galibert/master
2021-10-17 Paul Annesleydfflegalize: remove redundant check for initialized...
2021-10-07 Marcelina KościelnickaFfData: some refactoring.
2021-10-02 Marcelina KościelnickaHook up $aldff support in various passes.
2021-10-02 Marcelina Kościelnickazinit: Refactor to use FfData.
2021-10-02 Marcelina Kościelnickakernel/ff: Refactor FfData to enable FFs with async...
2021-10-02 Marcelina Kościelnickasimplemap: refactor to use FfData.
2021-09-09 Eddie Hungabc9: make re-entrant (#2993)
2021-09-09 Eddie Hungabc9: holes module to instantiate cells with NEW_ID...
2021-09-09 Eddie Hungabc9: replace cell type/parameters if derived type...
2021-08-22 Marcelina Kościelnickaopt_merge: Remove and reinsert init when connecting...
2021-08-22 Marcelina Kościelnickaopt_clean: Make the init attribute follow the FF's Q.
2021-08-14 Marcelina Kościelnickaproc_prune: Make assign removal and promotion per-bit...
2021-08-13 Marcelina KościelnickaAdd opt_mem_widen pass.
2021-08-13 Marcelina Kościelnickamemory_share: Add -nosat and -nowiden options.
2021-08-13 Marcelina Kościelnickamemory_dff: Recognize soft transparency logic.
2021-08-13 Marcelina KościelnickaAdd new opt_mem_priority pass.
2021-08-13 Miodrag MilanovićMerge pull request #2932 from YosysHQ/mwk/logger-check...
2021-08-12 Marcelina Kościelnickamemory_share: Pass addresses through sigmap_xmux everyw...
2021-08-12 Marcelina Kościelnickalogger: Add -check-expected subcommand.
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