Refactored synth_greenpak4 to use iopadmap for mapping GP_IOBUF/GP_OBUFT cells instea...
[yosys.git] / passes /
2016-05-04 Clifford WolfAdded tristate buffer support to iopadmap
2016-05-04 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-05-04 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2016-05-04 Clifford WolfFixed iopadmap attribute handling
2016-04-29 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-28 Clifford WolfAdded "qwp -v"
2016-04-26 Clifford WolfConnections between inputs and inouts are driven by...
2016-04-25 Clifford WolfFixed test_autotb for modules with many cell ports
2016-04-25 Clifford WolfFixed proc_mux performance bug
2016-04-25 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-24 Clifford WolfFixed performance bug in proc_dlatch
2016-04-23 Clifford WolfImprovements in greenpak4 shreg mapping
2016-04-23 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-23 Clifford WolfAdded "shregmap -zinit" for greenpak4 tech
2016-04-23 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-23 Andrew ZonenbergFixed typo in help text
2016-04-23 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-22 Clifford WolfAdded "shregmap -tech greenpak4"
2016-04-22 Clifford WolfMore flexible handling of initialization values
2016-04-21 Clifford WolfAdded "yosys -D" feature
2016-04-21 Clifford WolfFixed performance bug in "share" pass
2016-04-21 Clifford WolfImprovements in opt_expr
2016-04-21 Clifford WolfBugfix and improvements in memory_share
2016-04-19 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-18 Clifford WolfAdded "shregmap -params"
2016-04-18 Clifford WolfAdded "shregmap -zinit" and "shregmap -init"
2016-04-17 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-17 Clifford WolfImprovements in "shregmap"
2016-04-16 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-16 Clifford WolfAdded "shregmap" pass
2016-04-16 Clifford WolfFixed copy&paste error in log message in lut2mux
2016-04-07 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-04-05 Clifford WolfPrefer noninverting FFs in dfflibmap
2016-04-05 Clifford WolfImproved formatting of "sat" output tables
2016-04-01 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-03-31 Clifford WolfImproved opt_merge support for $pmux cells
2016-03-31 Clifford WolfPreserve empty $pmux default cases
2016-03-31 Clifford WolfTypo fixes in opt_expr and opt_merge
2016-03-31 Clifford WolfRenamed opt_share to opt_merge
2016-03-31 Clifford WolfRenamed opt_const to opt_expr
2016-03-31 Clifford WolfMerge pull request #142 from azonenberg/master
2016-03-31 Andrew ZonenbergRenamed counters pass to greenpak4_counters
2016-03-31 Andrew ZonenbergAdded initial implementation of "counters" pass to...
2016-03-31 Andrew ZonenbergReduced log verbosity
2016-03-31 Andrew ZonenbergContinued work on counter extraction. Can recognize...
2016-03-31 Andrew ZonenbergMerge https://github.com/cliffordwolf/yosys
2016-03-31 Andrew ZonenbergFixed typo in log message
2016-03-30 Andrew ZonenbergInitial work on greenpak4 counter extraction. Doesn...
2016-03-30 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2016-03-30 Clifford WolfAdded support for installed plugins
2016-03-23 Clifford WolfFixed handling of inverters (aka 1-input luts) in nlutmap
2016-03-21 Clifford WolfCleanup abstract modules at end of "hierarchy -top"
2016-03-21 Clifford WolfSupport for abstract modules in chparam
2016-03-19 Clifford WolfImprovements in ABCEXTERNAL handling
2016-03-19 Clifford WolfMerge pull request #130 from ravenexp/master
2016-03-19 Sergey KvachonokSupport calling out to an external ABC.
2016-03-11 Clifford WolfMerge commit 'b34385ec924b6067c1f82bdbae923f8062518956'
2016-03-07 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2016-03-07 Clifford WolfUsing "mfs" and "lutpack" in ABC lut mapping
2016-02-13 Clifford WolfFixed some visual studio warnings
2016-02-13 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2016-02-13 Clifford WolfAdded "int ceil_log2(int)" function
2016-02-04 Clifford WolfAdded "stat -liberty" for calculating chip area
2016-02-02 Clifford WolfImproved dffsr2dff pass
2016-02-02 Clifford WolfAdded dffsr2dff
2016-02-02 Clifford WolfUse alphanumerical order instead of idstring idx in...
2016-02-01 Clifford WolfAdded "abc -luts" option, Improved Xilinx logic mapping
2016-02-01 Clifford WolfImprovements in dfflibmap (FFs with Q/QN outputs, DFFs...
2016-01-31 Clifford WolfMerge branch 'rtlil_remove2_speedup' of https://github...
2016-01-31 Clifford WolfMore clang sanitizer stuff
2016-01-08 Clifford WolfAdded "equiv_struct -fwonly"
2016-01-08 Clifford WolfBugfixes in equiv_struct
2016-01-08 Clifford WolfAdded "submod -copy"
2016-01-06 Clifford WolfAdded "equiv_struct -maxiter <N>"
2016-01-06 Clifford WolfAdded "equiv_add -try" mode
2015-12-22 Clifford WolfFixed "splitnets -ports" for hierarchical designs
2015-12-20 Clifford WolfAdded %R select expression
2015-12-07 Clifford WolfMerge pull request #108 from cseed/master
2015-12-02 Clifford WolfImproved proc_mux performance for huge always blocks
2015-11-19 Clifford WolfAdded torder command
2015-11-10 Clifford WolfAdded "abc -g"
2015-11-08 Clifford WolfMerge pull request #97 from zeldin/master
2015-11-08 Marcus ComstedtFix a segfault in dffinit when the value has too few...
2015-11-07 Clifford WolfAdded "singleton" pass
2015-11-05 Clifford WolfBugfix in mapping $tribuf to $_TBUF_
2015-10-31 Clifford WolfBugfix in memory_dff
2015-10-31 Clifford WolfImprovements in wreduce
2015-10-27 Clifford WolfUse mfp<> in equiv_mark
2015-10-25 Clifford WolfImprovements in equiv_struct
2015-10-25 Clifford WolfMajor refactoring of equiv_struct
2015-10-25 Clifford WolfImport more std:: stuff into Yosys namespace
2015-10-25 Clifford WolfAdded "equiv_add -cell"
2015-10-25 Clifford Wolfequiv_struct now creates equiv_merged attributes
2015-10-24 Clifford WolfImprovements in equiv_struct
2015-10-24 Clifford Wolfrenamed SigSpec::to_single_sigbit() to SigSpec::as_bit...
2015-10-24 Clifford Wolfimprovement in "stat"
2015-10-24 Clifford Wolfequiv_purge bugfix, using SigChunk in Yosys namespace
2015-10-24 Clifford WolfFixed handling of driver-driver conflicts in wreduce
2015-10-23 Clifford WolfAdded equiv_mark command
2015-10-23 Clifford WolfDisabled "Skipping blackbox module" msg in show command
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