git.libre-soc.org Git - binutils-gdb.git/history

[binutils-gdb.git] / sim / v850 / sim-main.h

1997-09-19	Andrew Cagney	Clean up tracing for Bcond & jmp insns.	blob \| commitdiff \| raw
1997-09-19	Andrew Cagney	Fix cmov immed.	blob \| commitdiff \| raw \| diff to current
1997-09-19	Andrew Cagney	Fix cmov insn.	blob \| commitdiff \| raw \| diff to current
1997-09-17	Andrew Cagney	Clean up more tracing.	blob \| commitdiff \| raw \| diff to current
1997-09-17	Andrew Cagney	Fix tracing for: "ctret", "bsw", "hsw"	blob \| commitdiff \| raw \| diff to current
1997-09-16	Andrew Cagney	Smooth some of ALU tracing's rough edges.	blob \| commitdiff \| raw \| diff to current
1997-09-16	Andrew Cagney	Restrict ldsr (load system register) to modifying just...	blob \| commitdiff \| raw \| diff to current
1997-09-15	Andrew Cagney	For instructions moved into v850.igen was computing...	blob \| commitdiff \| raw \| diff to current
1997-09-15	Andrew Cagney	Fix sanitization for v850 V v850e V v850eq	blob \| commitdiff \| raw \| diff to current
1997-09-15	Andrew Cagney	For v850eq start up with US bit set.	blob \| commitdiff \| raw \| diff to current
1997-09-12	Andrew Cagney	Check reserved bits before executing instructions.	blob \| commitdiff \| raw \| diff to current
1997-09-12	Andrew Cagney	Add profiling support to v850*.	blob \| commitdiff \| raw \| diff to current
1997-09-08	Andrew Cagney	Add multi-sim support to v850/v850e/v850eq simulators.	blob \| commitdiff \| raw \| diff to current
1997-09-04	Andrew Cagney	Replace memory model with one from sim/common directory.	blob \| commitdiff \| raw \| diff to current
1997-09-03	Andrew Cagney	Pacify gcc-current -Wall.	blob \| commitdiff \| raw \| diff to current
1997-09-03	Andrew Cagney	Standard simulator header file.	blob \| commitdiff \| raw \| diff to current

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