Fix MSB0 issues in the pseudo-code for augmented register numbering
[libreriscv.git] / simple_v_extension /
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2020-10-26 Luke Kenneth Casso... whitespace
2020-10-19 Jacob Lifshayadd masked_vector_chaining.mdwn
2020-09-16 Luke Kenneth Casso... move openpowerna .tex to conferences directory
2020-09-10 Luke Kenneth Casso... add NLnet PET link
2020-09-10 Luke Kenneth Casso... add more openpower2020 slides
2020-09-10 Luke Kenneth Casso... add additional vhdl-vs-nmigen screenshots to openpower2020
2020-09-09 Luke Kenneth Casso... more slides, add PowerISA decoder screenshot
2020-09-09 Luke Kenneth Casso... more slides in openpower 2020
2020-09-09 Luke Kenneth Casso... add openpower 2020 slides presentation (texstudio)
2020-09-04 Luke Kenneth Casso... replace NLNet with NLnet (doh)
2019-12-04 adam@5e096883a01aa... Fix likely type: "mandary -> mandatory"
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2019-10-08 Luke Kenneth Casso... inversion limit wrong
2019-10-08 Luke Kenneth Casso... add cycling comment
2019-10-08 Luke Kenneth Casso... reword SHAPE, reintroduce offset
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2019-10-08 Luke Kenneth Casso... add comment about vector length / dot-product
2019-10-08 Luke Kenneth Casso... add comment about vector length / dot-product
2019-10-07 Luke Kenneth Casso... add SHAPE / REMAP area to VBLOCK2
2019-10-07 Luke Kenneth Casso... add SHAPE CSR
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2019-10-06 Luke Kenneth Casso... indent pseudocode
2019-10-06 Luke Kenneth Casso... add CORDIC paper link
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2019-10-03 Luke Kenneth Casso... clarify sbf / sif / sof
2019-10-03 Luke Kenneth Casso... clarify and add better pseudocode
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2019-10-02 Luke Kenneth Casso... move standards page
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2019-09-30 Luke Kenneth Casso... add missing bitmanip opcodes
2019-09-30 Luke Kenneth Casso... add links, add bitmanip logic ops
2019-09-28 Luke Kenneth Casso... add standards tag
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