git.libre-soc.org Git - microwatt.git/history

2020-05-19	Anton Blanchard	Merge pull request #174 from antonblanchard/yosys-fixes	blob \| commitdiff \| raw
2020-05-18	Anton Blanchard	Merge pull request #169 from paulusmack/mmu	blob \| commitdiff \| raw
2020-05-14	Paul Mackerras	soc: Work around compile error with ghdl 0.37-dev	blob \| commitdiff \| raw
2020-05-14	Paul Mackerras	Merge branch 'mmu'	blob \| commitdiff \| raw \| diff to current
2020-05-14	Anton Blanchard	Merge pull request #170 from antonblanchard/litedram	blob \| commitdiff \| raw \| diff to current
2020-05-09	Benjamin Herrenschmidt	litedram: Add support for Microwatt-initialized controller	blob \| commitdiff \| raw \| diff to current
2020-05-08	Benjamin Herrenschmidt	syscon: Add syscon registers	blob \| commitdiff \| raw \| diff to current
2020-05-08	Benjamin Herrenschmidt	soc: Add DRAM address decoding	blob \| commitdiff \| raw \| diff to current
2020-05-08	Benjamin Herrenschmidt	core: Add alternate reset address	blob \| commitdiff \| raw \| diff to current
2020-05-06	Paul Mackerras	Merge remote-tracking branch 'remotes/origin/master'	blob \| commitdiff \| raw \| diff to current
2020-05-06	Anton Blanchard	Merge pull request #165 from mikey/xics	blob \| commitdiff \| raw \| diff to current
2020-04-23	Michael Neuling	XICS interrupt controller	blob \| commitdiff \| raw \| diff to current
2020-01-11	Anton Blanchard	Merge pull request #133 from antonblanchard/ghdl-synth	blob \| commitdiff \| raw \| diff to current
2020-01-11	Anton Blanchard	Removed unused core_terminated signal	blob \| commitdiff \| raw \| diff to current
2019-11-15	Anton Blanchard	Merge pull request #118 from antonblanchard/bus-pipeline	blob \| commitdiff \| raw \| diff to current
2019-10-30	Benjamin Herrenschmidt	wb_arbiter: Make arbiter size parametric	blob \| commitdiff \| raw \| diff to current
2019-10-30	Benjamin Herrenschmidt	ram: Rework main RAM interface	blob \| commitdiff \| raw \| diff to current
2019-10-30	Benjamin Herrenschmidt	Add option to not flatten hierarchy	blob \| commitdiff \| raw \| diff to current
2019-10-30	Benjamin Herrenschmidt	intercon: Generate stall signals for non-pipelined...	blob \| commitdiff \| raw \| diff to current
2019-10-25	Anton Blanchard	Merge pull request #115 from antonblanchard/reduce...	blob \| commitdiff \| raw \| diff to current
2019-10-23	Benjamin Herrenschmidt	Reduce wishbone address size to 32-bit	blob \| commitdiff \| raw \| diff to current
2019-10-11	Anton Blanchard	Merge pull request #84 from classilla/master	blob \| commitdiff \| raw \| diff to current
2019-10-11	Anton Blanchard	Merge pull request #89 from mikey/gitignore	blob \| commitdiff \| raw \| diff to current
2019-10-10	Anton Blanchard	Merge pull request #86 from antonblanchard/outstanding...	blob \| commitdiff \| raw \| diff to current
2019-10-10	Anton Blanchard	Merge pull request #85 from antonblanchard/leadingzeroe...	blob \| commitdiff \| raw \| diff to current
2019-10-10	Anton Blanchard	Merge pull request #79 from deece/uart_address	blob \| commitdiff \| raw \| diff to current
2019-10-08	Alastair D'Silva	Tighten UART address	blob \| commitdiff \| raw \| diff to current
2019-09-24	Anton Blanchard	Merge branch 'divider' of https://github.com/paulusmack...	blob \| commitdiff \| raw \| diff to current
2019-09-24	Anton Blanchard	Merge pull request #69 from antonblanchard/debug-module	blob \| commitdiff \| raw \| diff to current
2019-09-20	Benjamin Herrenschmidt	Add core debug module	blob \| commitdiff \| raw \| diff to current
2019-09-20	Benjamin Herrenschmidt	Add DMI address decoder	blob \| commitdiff \| raw \| diff to current
2019-09-20	Benjamin Herrenschmidt	Wishbone debug module	blob \| commitdiff \| raw \| diff to current
2019-09-20	Benjamin Herrenschmidt	Add a debug (DMI) bus and a JTAG interface to it on...	blob \| commitdiff \| raw \| diff to current
2019-09-20	Benjamin Herrenschmidt	Use a 3 way WB arbiter and cleanup fpga toplevel	blob \| commitdiff \| raw \| diff to current
2019-09-10	Benjamin Herrenschmidt	Switch soc to use std_ulogic	blob \| commitdiff \| raw \| diff to current
2019-09-10	Benjamin Herrenschmidt	Share soc.vhdl between FPGA and sim	blob \| commitdiff \| raw \| diff to current

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