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dcache: Add wishbone pipelining support
[microwatt.git] / soc.vhdl
2019-10-30 Benjamin Herrenschmidtintercon: Generate stall signals for non-pipelined... blob | commitdiff | raw
2019-10-25 Anton BlanchardMerge pull request #115 from antonblanchard/reduce... blob | commitdiff | raw | diff to current
2019-10-23 Benjamin HerrenschmidtReduce wishbone address size to 32-bit blob | commitdiff | raw | diff to current
2019-10-11 Anton BlanchardMerge pull request #84 from classilla/master blob | commitdiff | raw | diff to current
2019-10-11 Anton BlanchardMerge pull request #89 from mikey/gitignore blob | commitdiff | raw | diff to current
2019-10-10 Anton BlanchardMerge pull request #86 from antonblanchard/outstanding... blob | commitdiff | raw | diff to current
2019-10-10 Anton BlanchardMerge pull request #85 from antonblanchard/leadingzeroe... blob | commitdiff | raw | diff to current
2019-10-10 Anton BlanchardMerge pull request #79 from deece/uart_address blob | commitdiff | raw | diff to current
2019-10-08 Alastair D'SilvaTighten UART address blob | commitdiff | raw | diff to current
2019-09-24 Anton BlanchardMerge branch 'divider' of https://github.com/paulusmack... blob | commitdiff | raw | diff to current
2019-09-24 Anton BlanchardMerge pull request #69 from antonblanchard/debug-module blob | commitdiff | raw | diff to current
2019-09-20 Benjamin HerrenschmidtAdd core debug module blob | commitdiff | raw | diff to current
2019-09-20 Benjamin HerrenschmidtAdd DMI address decoder blob | commitdiff | raw | diff to current
2019-09-20 Benjamin HerrenschmidtWishbone debug module blob | commitdiff | raw | diff to current
2019-09-20 Benjamin HerrenschmidtAdd a debug (DMI) bus and a JTAG interface to it on... blob | commitdiff | raw | diff to current
2019-09-20 Benjamin HerrenschmidtUse a 3 way WB arbiter and cleanup fpga toplevel blob | commitdiff | raw | diff to current
2019-09-10 Benjamin HerrenschmidtSwitch soc to use std_ulogic blob | commitdiff | raw | diff to current
2019-09-10 Benjamin HerrenschmidtShare soc.vhdl between FPGA and sim blob | commitdiff | raw | diff to current