stats: update stats for mmap() change.
[gem5.git] / src / arch / arm / isa /
2016-03-01 Mitch Hayengaarm: Squash after returning from exceptions in v7
2016-02-07 Steve Reinhardtstyle: remove trailing whitespace
2016-01-18 Steve Reinhardtcpu. arch: add initiateMemRead() to ExecContext interface
2016-01-07 Gabor Dozsapseudo inst,util: Add optional key to initparam pseudo...
2015-10-09 Rekai Gonzalez Alb... isa: Add parameter to pick different decoder inside ISA
2015-09-30 Mitch Hayengaisa,cpu: Add support for FS SMT Interrupts
2015-06-09 Rune Holmarm: Fix typo in ldrsh instruction name
2015-05-05 Andreas Hanssonarm: Add missing FPEXC.EN check
2015-03-02 Giacomo Gabrielliarm: Remove unnecessary dependencies between AArch64...
2015-02-16 Andreas Sandbergarm: Merge ISA files with pseudo instructions
2015-01-25 Ali Saidiarm: always set the IsFirstMicroop flag
2014-12-23 Andreas Sandbergarm: Raise an alignment fault if a PC has illegal alignment
2014-11-14 Andreas Hanssonarm: Fixes based on UBSan and static analysis
2014-10-30 Ali Saidiautomated merge
2014-10-30 Ali Saidiarm: Mark some miscregs (timer counter) registers at...
2014-10-16 Andreas Hanssonarch: Use shared_ptr for all Faults
2014-09-02 Akash Bagdiaarm: Don't speculatively access most miscregisters.
2014-10-01 Andreas Hanssonarm: More UBSan cleanups after additional full-system...
2014-09-27 Andreas Hanssonarm: Fixed undefined behaviours identified by gcc
2014-09-03 Mitch Hayengaarm: Make memory ops work on 64bit/128-bit quantities
2014-09-03 Mitch Hayengaarm: Fix v8 neon latency issue for loads/stores
2014-04-29 Curtis Dunhamarm: use condition code registers for ARM ISA
2014-09-03 Andrew Bardsleyarm: ISA X31 destination register fix
2014-09-03 Mitch Hayengaarm: Mark v7 cbz instructions as direct branches
2014-09-03 Andreas Sandbergarch, cpu: Factor out the ExecContext into a proper...
2014-04-17 Ali Saidiarm: Make sure UndefinedInstructions are properly initi...
2014-05-09 Andrew Bardsleyarm: Add branch flags onto macroops
2014-05-09 Curtis Dunhamarm: add preliminary ISA splits for ARM arch
2014-05-09 Curtis Dunhamarch: teach ISA parser how to split code across files
2014-05-09 Geoffrey Blakearm: Panics in miscreg read functions can be tripped...
2014-05-09 Curtis Dunhamarch: remove inline specifiers on all inst constrs...
2014-05-09 Curtis Dunhamarm: cleanup ARM ISA definition
2014-04-23 Mitchell Hayengaarm: Don't use a stack allocated mnemonic
2014-03-23 Eric Van Hensbergenarm: m5ops readfile64 args broken, offset coming throug...
2014-01-24 ARM gem5 Developersarm: Add support for ARMv8 (AArch64 & AArch32)
2013-05-14 Andreas Sandbergarm: Add support for the m5fail pseudo-op
2013-03-05 Ali SaidiARM: fix some cases where instructions that write to...
2013-02-19 Andreas Hanssonscons: Fix warnings issued by clang 3.2svn (XCode 4.6)
2013-02-19 Andreas Hanssonscons: Add warning for missing declarations
2013-02-19 Andreas Hanssonscons: Add warning for overloaded virtual functions
2013-02-19 Andreas Hanssonscons: Fix up numerous warnings about name shadowing
2013-02-15 Ali Saidiarm: fix some fp comparisons that worked by accident.
2012-12-12 Nathanael Premillieuarm: set uopSet_uop as conditional or unconditional...
2012-09-25 Nathanael PremillieuARM: Inst writing to cntrlReg registers not set as...
2012-09-25 Ali SaidiARM: Predict target of more instructions that modify PC.
2012-06-29 Ali SaidiARM: Fix identification of one RAS pop instruction.
2012-05-25 Gabe BlackISA: Make the decode function part of the ISA's decoder.
2012-04-14 Andreas Hanssonclang/gcc: Fix compilation issues with clang 3.0 and...
2012-03-21 Nathanael PremillieuARM: Fix case where cond/uncond control is mis-specified
2012-03-21 Ali SaidiARM: Clean up condCodes in IT blocks.
2012-03-21 Geoffrey BlakeARM: IT doesn't need to be serializing.
2012-03-19 Andreas Hanssongcc: Clean-up of non-C++0x compliant code, first steps
2012-03-09 Brian GraysonARM: Fix branch prediction issue with CB(N)Z instruction
2012-03-01 Matt HorsnellARM: Add limited CP14 support.
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Koan-Sin Tanclang: Enable compiling gem5 using clang 2.9 and 3.0
2012-01-31 Dam Sunwooutil: implements "writefile" gem5 op to export file...
2012-01-31 Geoffrey BlakeCheckerCPU: Re-factor CheckerCPU to be compatible with...
2012-01-31 Gabe BlackMerge with main repository.
2012-01-29 Gabe BlackYet another merge with the main repository.
2012-01-28 Gabe BlackMerge with the main repo.
2012-01-16 Gabe BlackMerge yet again with the main repository.
2012-01-10 Ali SaidiARM: Add support for initparam m5 op
2012-01-07 Gabe BlackAnother merge with the main repository.
2012-01-07 Gabe BlackMerge with the main repository again.
2012-01-07 Gabe BlackMerge with main repository.
2011-12-01 Ali SaidiARM: Add IsSerializeAfter and IsNonSpeculative flag...
2011-11-02 Gabe BlackSE/FS: Get rid of FULL_SYSTEM in the ARM ISA.
2011-10-31 Gabe BlackGCC: Get everything working with gcc 4.6.1.
2011-09-27 Gabe BlackISA parser: Use '_' instead of '.' to delimit type...
2011-09-19 Gabe BlackPseudoInst: Remove the now unnecessary #if FULL_SYSTEMs...
2011-09-19 Gabe BlackPseudoinst: Add an initParam pseudo inst function.
2011-09-13 Chander SudanthiCP15 c15: enable execution with accesses to c15 registers
2011-08-19 Ali SaidiARM: Add support for DIV/SDIV instructions.
2011-08-19 Geoffrey BlakeFix bugs due to interaction between SEV instructions...
2011-07-15 Wade WalkerARM: Fix SWP/SWPB undefined instruction behavior
2011-07-05 Gabe BlackISA parser: Define operand types with a ctype directly.
2011-07-03 Nilay VaishMerged with Gabe's recent changes.
2011-07-03 Gabe BlackExecContext: Rename the readBytes/writeBytes functions...
2011-07-03 Gabe BlackISA: Use readBytes/writeBytes for all instruction level...
2011-06-17 Gedare BloomARM: Add m5ops and related support for workbegin()...
2011-05-18 Nathan Binkertgcc: fix an uninitialized variable warning from G+...
2011-05-13 Ali SaidiARM: Generate condition code setting code based on...
2011-05-13 Ali SaidiARM: Construct the predicate test register for more...
2011-05-13 Ali SaidiARM: Further break up condition code into NZ, C, V...
2011-05-13 Ali SaidiARM: Remove the saturating (Q) condition code from...
2011-05-13 Ali SaidiARM: Break up condition codes into normal flags, satura...
2011-05-05 Prakash RamrakhyaniARM: Implement WFE/WFI/SEV semantics.
2011-05-05 Ali SaidiARM: Fix small bug with vcvt instruction
2011-04-15 Nathan Binkerttrace: reimplement the DTRACE function so it doesn...
2011-04-15 Nathan Binkertincludes: sort all includes
2011-04-04 Ali SaidiARM: Use CPU local lock before sending load to mem...
2011-04-04 Ali SaidiARM: Fix bug in MicroLdrNeon templates for initiateAcc().
2011-04-04 William WangARM: Cleanup and small fixes to some NEON ops to match...
2011-04-04 Ali SaidiARM: Cleanup implementation of ITSTATE and put importan...
2011-04-04 Ali SaidiARM: Fix m5op parameters bug.
2011-04-04 Ali SaidiARM: Tag appropriate instructions as IsReturn
2011-03-18 Ali SaidiAutomated merge with ssh://hg@repo.m5sim.org/m5
2011-03-18 Ali SaidiARM: Fix subtle bug in LDM.
2011-03-18 Ali SaidiARM: Identify branches as conditional or unconditional...
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