ARM: Don't reset CPUs that are going to be switched in.
[gem5.git] / src / arch / arm / isa.cc
2012-03-02 Ali SaidiARM: FIx a bug preventing multiple cores booting a...
2012-03-01 Ali SaidiARM: Add support for Versatile Express extended memory map
2012-03-01 Matt HorsnellARM: Add limited CP14 support.
2012-02-12 Ali Saidimem: Add a master ID to each request object.
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Geoffrey BlakeCheckerCPU: Re-factor CheckerCPU to be compatible with...
2011-09-13 Daniel JohnsonARM: Implement numcpus bits in L2CTLR register.
2011-08-19 Ali SaidiARM: Mark some variables uncacheable until boot all...
2011-08-19 Ali SaidiARM: Add support for DIV/SDIV instructions.
2011-07-15 Wade WalkerARM: Add two unimplemented miscellaneous registers.
2011-05-13 Ali SaidiARM: Remove the saturating (Q) condition code from...
2011-05-13 Chander SudanthiARM: Better RealView/Versatile EB platform support.
2011-05-05 Ali SaidiARM: Add support for MP misc regs and broadcast flushes.
2011-04-15 Nathan Binkerttrace: reimplement the DTRACE function so it doesn...
2011-04-04 Ali SaidiARM: Fix checkpoint restoration into O3 CPU and the...
2011-04-04 William WangARM: Cleanup and small fixes to some NEON ops to match...
2011-04-04 Ali SaidiARM: Cleanup implementation of ITSTATE and put importan...
2011-03-18 Ali SaidiAutomated merge with ssh://hg@repo.m5sim.org/m5
2011-03-18 Ali SaidiARM: Implement the Instruction Set Attribute Registers...
2011-02-23 Ali SaidiARM: Reset simulation statistics when pref counters...
2010-12-08 Giacomo GabrielliO3: Make all instructions that write a misc. register...
2010-11-15 Ali SaidiARM: Return an FailUnimp instruction when an unimplemen...
2010-11-15 Ali SaidiARM: Cache the misc regs at the TLB to limit readMiscRe...
2010-11-08 Ali SaidiARM: Keep the warnings to a minimum.
2010-10-31 Gabe BlackISA,CPU,etc: Create an ISA defined PC type that abstrac...
2010-10-01 Ali SaidiARM: Clean up use of TBit and JBit.
2010-09-14 Gabe BlackFaults: Pass the StaticInst involved, if any, to a...
2010-08-26 Ali SaidiARM: Set the high bits in the part number so it's consi...
2010-08-26 Ali SaidiARM: Fix VFP enabled checks for mem instructions
2010-08-26 Gabe BlackARM: Implement CPACR register and return Undefined...
2010-08-23 Min Kyu JeongARM: Clean up flattening for SPSR adding
2010-08-23 Gene WuARM: Get SCTLR TE bit from reset SCTLR
2010-08-23 Ali SaidiARM: We don't currently support ThumbEE exceptions...
2010-08-23 Ali SaidiARM: Implement some more misc registers
2010-06-03 Ali SaidiARM: Fix issue with m5.fast and ARM
2010-06-02 Dam SunwooARM: Added support for Access Flag and some CP15 regs...
2010-06-02 Gabe BlackARM: Move the ISA "clear" function into isa.cc.
2010-06-02 Gabe BlackARM: Implement support for the IT instruction and the...
2010-06-02 Ali SaidiARM: Some TLB bug fixes.
2010-06-02 Ali SaidiARM: Move Miscreg functions out of isa.hh
2009-07-10 Gabe BlackARM: Fold the MiscRegFile all the way into the ISA...
2009-07-09 Gabe BlackRegisters: Add an ISA object which replaces the MiscReg...