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arm: Fixed undefined behaviours identified by gcc
[gem5.git]
/
src
/
arch
/
arm
/
isa.cc
2014-04-29
Curtis Dunham
arm: use condition code registers for ARM ISA
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2014-04-17
Ali Saidi
arm: allow DC instructions by default so SE mode works
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2014-05-09
Geoffrey Blake
arm: Panics in miscreg read functions can be tripped...
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2014-01-24
ARM gem5 Developers
arm: Add support for ARMv8 (AArch64 & AArch32)
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2014-01-24
Andreas Hansson
arch: Make all register index flattening const
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2013-07-18
Andreas Hansson
mem: Set the cache line size on a system level
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2013-01-07
Andreas Sandberg
arm: Remove the register mapping hack used when copying TCs
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2013-01-07
Andreas Sandberg
arm: Make ID registers ISA parameters
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2013-01-07
Andreas Sandberg
arch: Make the ISA class inherit from SimObject
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2013-01-05
Gabe Black
Decoder: Remove the thread context get/set from the...
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2013-01-05
Gabe Black
ARM: Keep a copy of the fpscr len and stride fields...
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2012-07-27
Anthony Gutierrez
ARM: fix value of MISCREG_CTR returned by readMiscReg()
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2012-06-05
Chander Sudanthi
ARM: Fix MPIDR and MIDR register implementation.
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2012-03-09
Geoffrey Blake
CheckerCPU: Make CheckerCPU runtime selectable instead...
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2012-03-02
Ali Saidi
ARM: FIx a bug preventing multiple cores booting a...
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2012-03-01
Ali Saidi
ARM: Add support for Versatile Express extended memory map
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2012-03-01
Matt Horsnell
ARM: Add limited CP14 support.
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2012-02-12
Ali Saidi
mem: Add a master ID to each request object.
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2012-02-01
Gabe Black
Merge ... head, hopefully the last time for this batch.
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2012-01-31
Geoffrey Blake
CheckerCPU: Re-factor CheckerCPU to be compatible with...
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2011-09-13
Daniel Johnson
ARM: Implement numcpus bits in L2CTLR register.
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2011-08-19
Ali Saidi
ARM: Mark some variables uncacheable until boot all...
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2011-08-19
Ali Saidi
ARM: Add support for DIV/SDIV instructions.
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2011-07-15
Wade Walker
ARM: Add two unimplemented miscellaneous registers.
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2011-05-13
Ali Saidi
ARM: Remove the saturating (Q) condition code from...
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2011-05-13
Chander Sudanthi
ARM: Better RealView/Versatile EB platform support.
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2011-05-05
Ali Saidi
ARM: Add support for MP misc regs and broadcast flushes.
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2011-04-15
Nathan Binkert
trace: reimplement the DTRACE function so it doesn...
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2011-04-04
Ali Saidi
ARM: Fix checkpoint restoration into O3 CPU and the...
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2011-04-04
William Wang
ARM: Cleanup and small fixes to some NEON ops to match...
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2011-04-04
Ali Saidi
ARM: Cleanup implementation of ITSTATE and put importan...
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2011-03-18
Ali Saidi
Automated merge with ssh://hg@repo.m5sim.org/m5
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2011-03-18
Ali Saidi
ARM: Implement the Instruction Set Attribute Registers...
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2011-02-23
Ali Saidi
ARM: Reset simulation statistics when pref counters...
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2010-12-08
Giacomo Gabrielli
O3: Make all instructions that write a misc. register...
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2010-11-15
Ali Saidi
ARM: Return an FailUnimp instruction when an unimplemen...
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2010-11-15
Ali Saidi
ARM: Cache the misc regs at the TLB to limit readMiscRe...
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2010-11-08
Ali Saidi
ARM: Keep the warnings to a minimum.
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2010-10-31
Gabe Black
ISA,CPU,etc: Create an ISA defined PC type that abstrac...
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2010-10-01
Ali Saidi
ARM: Clean up use of TBit and JBit.
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2010-09-14
Gabe Black
Faults: Pass the StaticInst involved, if any, to a...
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2010-08-26
Ali Saidi
ARM: Set the high bits in the part number so it's consi...
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2010-08-26
Ali Saidi
ARM: Fix VFP enabled checks for mem instructions
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2010-08-26
Gabe Black
ARM: Implement CPACR register and return Undefined...
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2010-08-23
Min Kyu Jeong
ARM: Clean up flattening for SPSR adding
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2010-08-23
Gene Wu
ARM: Get SCTLR TE bit from reset SCTLR
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2010-08-23
Ali Saidi
ARM: We don't currently support ThumbEE exceptions...
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2010-08-23
Ali Saidi
ARM: Implement some more misc registers
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2010-06-03
Ali Saidi
ARM: Fix issue with m5.fast and ARM
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2010-06-02
Dam Sunwoo
ARM: Added support for Access Flag and some CP15 regs...
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2010-06-02
Gabe Black
ARM: Move the ISA "clear" function into isa.cc.
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2010-06-02
Gabe Black
ARM: Implement support for the IT instruction and the...
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2010-06-02
Ali Saidi
ARM: Some TLB bug fixes.
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2010-06-02
Ali Saidi
ARM: Move Miscreg functions out of isa.hh
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2009-07-10
Gabe Black
ARM: Fold the MiscRegFile all the way into the ISA...
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2009-07-09
Gabe Black
Registers: Add an ISA object which replaces the MiscReg...
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