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ARM: Cache the misc regs at the TLB to limit readMiscReg() calls.
[gem5.git]
/
src
/
arch
/
arm
/
isa.cc
2010-11-15
Ali Saidi
ARM: Cache the misc regs at the TLB to limit readMiscRe...
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2010-11-08
Ali Saidi
ARM: Keep the warnings to a minimum.
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2010-10-31
Gabe Black
ISA,CPU,etc: Create an ISA defined PC type that abstrac...
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2010-10-01
Ali Saidi
ARM: Clean up use of TBit and JBit.
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2010-09-14
Gabe Black
Faults: Pass the StaticInst involved, if any, to a...
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2010-08-26
Ali Saidi
ARM: Set the high bits in the part number so it's consi...
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2010-08-26
Ali Saidi
ARM: Fix VFP enabled checks for mem instructions
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2010-08-26
Gabe Black
ARM: Implement CPACR register and return Undefined...
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2010-08-23
Min Kyu Jeong
ARM: Clean up flattening for SPSR adding
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2010-08-23
Gene Wu
ARM: Get SCTLR TE bit from reset SCTLR
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2010-08-23
Ali Saidi
ARM: We don't currently support ThumbEE exceptions...
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2010-08-23
Ali Saidi
ARM: Implement some more misc registers
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2010-06-03
Ali Saidi
ARM: Fix issue with m5.fast and ARM
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2010-06-02
Dam Sunwoo
ARM: Added support for Access Flag and some CP15 regs...
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2010-06-02
Gabe Black
ARM: Move the ISA "clear" function into isa.cc.
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2010-06-02
Gabe Black
ARM: Implement support for the IT instruction and the...
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2010-06-02
Ali Saidi
ARM: Some TLB bug fixes.
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2010-06-02
Ali Saidi
ARM: Move Miscreg functions out of isa.hh
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2009-07-10
Gabe Black
ARM: Fold the MiscRegFile all the way into the ISA...
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2009-07-09
Gabe Black
Registers: Add an ISA object which replaces the MiscReg...
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