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[gem5.git] / src / arch / arm / miscregs.hh

2018-09-13	Anouk Van Laer	arch-arm: Correction for address size in EL1&0 translation	blob \| commitdiff \| raw
2018-07-16	Giacomo Travaglini	arch-arm: Introduce ARMv8.1 Virtual Timer System Registers	blob \| commitdiff \| raw \| diff to current
2018-07-16	Giacomo Travaglini	arch-arm: Introduce RAS System Registers	blob \| commitdiff \| raw \| diff to current
2018-06-28	Andreas Sandberg	arch-arm: Fix incorrect t{0,1}sz field in TTBCR	blob \| commitdiff \| raw \| diff to current
2018-06-14	Giacomo Travaglini	arch-arm: Read APSR in User Mode	blob \| commitdiff \| raw \| diff to current
2018-05-29	Giacomo Travaglini	arch-arm: Remove unusued MISCREG_A64_UNIMPL	blob \| commitdiff \| raw \| diff to current
2018-05-29	Giacomo Travaglini	arch-arm: Add E2H bit to HCR_EL2 System register	blob \| commitdiff \| raw \| diff to current
2018-04-19	Giacomo Travaglini	arch-arm: Add ARMv8.1 TTBR1_EL2 register	blob \| commitdiff \| raw \| diff to current
2018-02-16	Giacomo Travaglini	arch-arm: IMPLEMENTATION DEFINED register	blob \| commitdiff \| raw \| diff to current
2018-02-16	Giacomo Travaglini	arch-arm: Arch regs and pseudo regs distinction	blob \| commitdiff \| raw \| diff to current
2018-02-07	Giacomo Travaglini	arch-arm: Change function name for banked miscregs	blob \| commitdiff \| raw \| diff to current
2017-04-03	Nikos Nikoleris	arm: Don't panic when checking coprocessor read/write...	blob \| commitdiff \| raw \| diff to current
2016-12-19	Curtis Dunham	arm: update AArch{64,32} register mappings	blob \| commitdiff \| raw \| diff to current
2016-08-02	Dylan Johnson	arm: add stage2 translation support	blob \| commitdiff \| raw \| diff to current
2016-06-02	Andreas Sandberg	arm: Rewrite ERET to behave according to the ARMv8 ARM	blob \| commitdiff \| raw \| diff to current
2015-05-26	Curtis Dunham	arm: implement the CONTEXTIDR_EL2 system reg.	blob \| commitdiff \| raw \| diff to current
2014-10-30	Ali Saidi	automated merge	blob \| commitdiff \| raw \| diff to current
2014-10-30	Ali Saidi	arm: Mark some miscregs (timer counter) registers at...	blob \| commitdiff \| raw \| diff to current
2014-10-01	Andreas Hansson	arm: Use MiscRegIndex rather than int when flattening	blob \| commitdiff \| raw \| diff to current
2014-04-29	Curtis Dunham	arm: use condition code registers for ARM ISA	blob \| commitdiff \| raw \| diff to current
2014-05-27	Curtis Dunham	arm: support 16kb vm granules	blob \| commitdiff \| raw \| diff to current
2014-01-24	ARM gem5 Developers	arm: Add support for ARMv8 (AArch64 & AArch32)	blob \| commitdiff \| raw \| diff to current
2013-10-31	Chander Sudanthi	ARM: add support for TEEHBR access	blob \| commitdiff \| raw \| diff to current
2013-01-07	Andreas Sandberg	arm: Remove the register mapping hack used when copying TCs	blob \| commitdiff \| raw \| diff to current
2012-09-25	Andreas Sandberg	arm: Use a static_assert to test that miscRegName[...	blob \| commitdiff \| raw \| diff to current
2012-07-27	Anthony Gutierrez	ARM: fix value of MISCREG_CTR returned by readMiscReg()	blob \| commitdiff \| raw \| diff to current
2012-06-05	Chander Sudanthi	ARM: removed extra white space	blob \| commitdiff \| raw \| diff to current
2012-03-19	Andreas Hansson	gcc: Clean-up of non-C++0x compliant code, first steps	blob \| commitdiff \| raw \| diff to current
2012-03-01	Matt Horsnell	ARM: Add limited CP14 support.	blob \| commitdiff \| raw \| diff to current
2011-09-13	Daniel Johnson	ARM: update TLB to set request packet ASID field	blob \| commitdiff \| raw \| diff to current
2011-09-13	Chander Sudanthi	CP15 c15: enable execution with accesses to c15 registers	blob \| commitdiff \| raw \| diff to current
2011-09-13	Daniel Johnson	ARM: Implement numcpus bits in L2CTLR register.	blob \| commitdiff \| raw \| diff to current
2011-07-15	Wade Walker	ARM: Add two unimplemented miscellaneous registers.	blob \| commitdiff \| raw \| diff to current
2011-05-13	Ali Saidi	ARM: Further break up condition code into NZ, C, V...	blob \| commitdiff \| raw \| diff to current
2011-05-13	Ali Saidi	ARM: Remove the saturating (Q) condition code from...	blob \| commitdiff \| raw \| diff to current
2011-05-13	Ali Saidi	ARM: Break up condition codes into normal flags, satura...	blob \| commitdiff \| raw \| diff to current
2011-05-13	Chander Sudanthi	ARM: Better RealView/Versatile EB platform support.	blob \| commitdiff \| raw \| diff to current
2011-05-05	Ali Saidi	ARM: Add support for MP misc regs and broadcast flushes.	blob \| commitdiff \| raw \| diff to current
2011-04-04	Ali Saidi	ARM: Use CPU local lock before sending load to mem...	blob \| commitdiff \| raw \| diff to current
2011-04-04	Ali Saidi	ARM: Fix checkpoint restoration into O3 CPU and the...	blob \| commitdiff \| raw \| diff to current
2011-04-04	William Wang	ARM: Cleanup and small fixes to some NEON ops to match...	blob \| commitdiff \| raw \| diff to current
2011-04-04	Ali Saidi	ARM: Cleanup implementation of ITSTATE and put importan...	blob \| commitdiff \| raw \| diff to current
2011-03-25	Gabe Black	Arm: Add in a missing miscRegName.	blob \| commitdiff \| raw \| diff to current
2011-03-18	Ali Saidi	Automated merge with ssh://hg@repo.m5sim.org/m5	blob \| commitdiff \| raw \| diff to current
2011-03-18	Ali Saidi	ARM: Implement the Instruction Set Attribute Registers...	blob \| commitdiff \| raw \| diff to current
2011-02-23	Ali Saidi	ARM: Adds dummy support for a L2 latency miscreg.	blob \| commitdiff \| raw \| diff to current
2010-12-08	Giacomo Gabrielli	O3: Make all instructions that write a misc. register...	blob \| commitdiff \| raw \| diff to current
2010-11-15	Ali Saidi	ARM: Add comment about the organization of the IT state...	blob \| commitdiff \| raw \| diff to current
2010-08-26	Gabe Black	ARM: Seperate out the renamable bits in the FPSCR.	blob \| commitdiff \| raw \| diff to current
2010-08-26	Gabe Black	ARM: Implement CPACR register and return Undefined...	blob \| commitdiff \| raw \| diff to current
2010-08-23	Ali Saidi	ARM: Implement some more misc registers	blob \| commitdiff \| raw \| diff to current
2010-06-02	Dam Sunwoo	ARM: Added support for Access Flag and some CP15 regs...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Implement support for the IT instruction and the...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Ali Saidi	ARM: Some TLB bug fixes.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Ali Saidi	ARM: Implement the ARM TLB/Tablewalker. Needs performan...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Ali Saidi	ARM: Implement ARM CPU interrupts	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Make MPIDR return 0 and ignore writes.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Set the value of the MVFR0 and MVFR1 registers.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Add support for VFP vector mode.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Implement and update the DFSR and IFSR registers...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Add in some missing SCTLR fields.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Warn/ignore when TLB maintenance operations are...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Handle accesses to TLBTR.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Handle accesses to the DACR.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Handle accesses to TTBR0 and TTBR1.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Convert the CP15 registers from MPU to MMU.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Ali Saidi	ARM: Add some support for wfi/wfe/yield/etc	blob \| commitdiff \| raw \| diff to current
2010-06-02	Ali Saidi	ARM: Move PC mode bits around so they can be used for...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Update the set of FP related miscregs.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Ignore attempts to disable coprocessors that aren...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Ignore/warn on accesses to the DRBAR, DRACR, and...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Allow access to the RGNR register.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Make the MPUIR register report that 1 unified...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Ignore/warn on accesses to the BPIALLIS and BPIALL...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Ignore/warn when CSSELR or CCSIDR are accessed.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Ignore/warn access to the bpimva registers.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Ignore/warn on accesses to the dccmvac register.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Ignore/warn on accesses to icimvau.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Ignore/warn on iciallu.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Ignore/warn on ICIALLUIS.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Add support for the clidr register.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Decode the unimplemented data barrier CP15 accesses.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Implement a stub of CPACR.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Decode the unimplemented cp15 instruction barrier.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Ignore accesses to DCCIMVAC.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Allow accesses to the software thread id registers.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Allow accesses to the contextidr register.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Warn about and ignore accesses to DCCISW.	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Implement a function to decode CP15 registers...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Replace the "never" condition with the "unconditio...	blob \| commitdiff \| raw \| diff to current
2010-06-02	Gabe Black	ARM: Track the current ISA mode using the PC.	blob \| commitdiff \| raw \| diff to current
2010-01-19	Derek Hower	merge	blob \| commitdiff \| raw \| diff to current
2009-11-15	Gabe Black	ARM: Define a mask to differentiate purely CPSR bits...	blob \| commitdiff \| raw \| diff to current
2009-11-11	Gabe Black	Merge with the head.	blob \| commitdiff \| raw \| diff to current
2009-11-11	Gabe Black	ARM: Implement fault classes.	blob \| commitdiff \| raw \| diff to current
2009-11-08	Gabe Black	ARM: Add in more bits for the mon mode.	blob \| commitdiff \| raw \| diff to current
2009-08-03	Derek Hower	Automated merge with ssh://hg@m5sim.org/m5	blob \| commitdiff \| raw \| diff to current
2009-07-31	Korey Sewell	merge mips fix and statetrace changes	blob \| commitdiff \| raw \| diff to current
2009-07-27	Gabe Black	ARM: Add in spots for the VFP control registers.	blob \| commitdiff \| raw \| diff to current
2009-06-27	Gabe Black	ARM: Fill out the printReg function.	blob \| commitdiff \| raw \| diff to current
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