arch,sim: Convert clone to GuestABI and define a cloneBackwardsFunc.
[gem5.git] / src / arch / arm /
2020-03-12 Gabe Blackarch,sim: Convert clone to GuestABI and define a cloneB...
2020-03-11 Gabe Blackconfig,arch,cpu,kern,sim: Extract kernel information...
2020-03-11 Andriani Mappouraarch-arm: Correct the Ids and names of the PMU events
2020-03-10 Giacomo Travagliniarch-arm: Remove unnecessary RegIndex set for VSTR...
2020-03-10 Adrian Herreraarch-arm: GenericTimer arch regs, perms/trapping
2020-03-10 Giacomo Travagliniarch-arm: Hint the compiler to inline getArmSystem
2020-03-10 Giacomo Travagliniarch-arm: Speedup ARM execution by avoiding expensive...
2020-03-10 Giacomo Travagliniarch-arm: python3 "/" will always produce a float
2020-03-10 Giacomo Travaglinimisc: string.join has been removed in python3
2020-03-09 Gabe Blackarch,cpu: Get rid of unused/unimplemented vtophys variants.
2020-03-07 Gabe Blackarch,cpu,gpu-compute,mem: Remove asid from Request...
2020-03-04 Giacomo Travagliniarch-arm: Remove unused getArmSystem helper
2020-03-04 Gabe Blackarch,cpu,mem: Replace the mmmapped IPR mechanism with...
2020-02-27 Gabe Blackarm: Expose the constants which select a semihosting...
2020-02-27 Gabe Blackarm: Use a const ThreadContext * and readMiscRegNoEffec...
2020-02-27 Gabe Blacksim,arch: Move code that waits for a GDB connection...
2020-02-26 Bobby R. Brucemisc: merge branch 'release-staging-v19.0.0.0' into...
2020-02-24 Bobby R. Brucemisc: Merged release-staging-v19.0.0.0 into develop
2020-02-20 Gabe Blackarch: Convert the static constexpr SIZE in vec_reg...
2020-02-20 Gabe Blackfastmodel: Use all possible address spaces when setting...
2020-02-20 Gabe Blackfastmodel: Use a shared pointer to track PC events.
2020-02-20 Gabe Blackfastmodel: Add in a missing include and namespace for...
2020-02-20 Gabe Blackfastmodel: Return nullptr from getCheckerCpuPtr on...
2020-02-20 Gabe Blackfastmodel: Ignore clearArchRegs for now.
2020-02-19 Gabe Blackfastmodel: Set itstate when building a PCState from...
2020-02-19 Adrian Herreraarch-arm: ArmISA::clear, inval TLB cached miscregs
2020-02-19 Adrian Herreramisc: pass ThreadContext on ISA clear
2020-02-19 Giacomo Travagliniarch, arch-arm: Use BaseISA in RenameMode interface
2020-02-19 Adrian Herreraarch-arm: Fix CNTFRQ_EL0 permission bits
2020-02-18 Matthew Porembaarch-arm: Add used attribute to pauth_helpers asserts
2020-02-18 Gabe Blackarm: Delete authors lists from the arm files.
2020-02-17 Giacomo Travagliniarch-arm: Be more verbose on load/store construction
2020-02-17 Giacomo Travagliniarch-arm: Fix ArmKVM build
2020-02-13 Gabe Blackarm: "Correct" the spelling of flavor.
2020-02-11 Gabe Blackarch: Get rid of the generic mmapped IPR mechanism.
2020-02-11 Gabe Blackarm: Call pseudoInst directly from the mmapped IPR...
2020-02-10 Gabe Blackarm: Fix how a bitfield is extracted in some SVE instru...
2020-02-10 Giacomo Travagliniarch-arm: LDTRSW was not marked as unpriviledged
2020-02-08 Gabe Blackarch,sim: Replace setuidFunc with ignoreFunc.
2020-02-08 Gabe Blackarch: Switch SyscallDescABI in for SyscallDesc.
2020-02-08 Gabe Blackarch: Simplify the SyscallDesc tables.
2020-02-07 Gabe Blackarch,sim: Use _m5opRange in System::allocPhysPages.
2020-02-06 Jordi Vaqueroarch-arm: Implement ARMv8.3-JSConv
2020-02-06 Jordi Vaqueroarch-arm: This commit adds Pointer Authentication feature.
2020-02-06 Gabe Blackfastmodel: Ensure unset vec reg bits are zero/false.
2020-02-06 Gabe Blackfastmodel: Implement flattened int reg reading and...
2020-02-05 Nils Asmussenarch-arm: make MicroUopSetPCCPSR SerializeAfter
2020-02-05 Gabe Blackcpu: Make getIsaPtr return a BaseISA pointer.
2020-02-05 Gabe Blackarch: Introduce a base class for ISA classes.
2020-02-05 Gabe Blackarm: Use static_cast to get access the ARM specific...
2020-02-04 Adrian Herreraarch-arm: AArch64 reg access HCR_EL2.E2H filter
2020-02-04 Adrian Herreraarch-arm: reg access permissions highest EL helper
2020-02-04 Giacomo Travagliniarch-arm: Split translateFs to distinguish when MMU...
2020-02-01 Gabe Blackarch,sim: Merge initCPU into the ISA System classes.
2020-02-01 Gabe Blackarch,sim: Merge initCPU and startupCPU.
2020-01-22 Gabe Blackfastmodel: Implement CC reg accessors.
2020-01-22 Gabe Blackarm: Remove checkpointing from the ARM TLBs.
2020-01-22 Gabe Blackarch: Get rid of the unused (and mostly undefined)...
2020-01-20 Jordi Vaqueroarch-arm: Fix EL2 target exception level for SP alignme...
2020-01-15 Adrian Herreraarch-arm: ELIsInHost, check VHE and SecEL2
2020-01-15 Adrian Herreraarch-arm: Virtualization Host Extensions checking
2020-01-08 Giacomo Travagliniarch, base: Move arm AtomicOpFunctor into the generic...
2020-01-07 Gabe Blackarch,sim: Promote the m5ops_base param to the System...
2020-01-07 Gabe Blackfastmodel: Implement the vecPredReg accessor functions.
2020-01-07 Gabe Blackarch,sim: Stop decoding the pseudo inst subfunc value.
2020-01-06 Gabe Blackarch,sim: Use the guest ABI mechanism with pseudo instr...
2020-01-06 Adrian Herreraarch-arm: Semihosting, specify files root dir
2019-12-30 Chun-Chen TK Hsufastmodel: Fix compilation errors
2019-12-27 Gabe Blackfastmodel: Move ARM but not CortexA76 specific bits...
2019-12-27 Gabe Blackfastmodel: Move the ARM IRIS threadcontext into CortexA76.
2019-12-27 Gabe Blackfastmodel: Mostly collapse ARM base classes for the...
2019-12-27 Gabe Blackfastmodel: Checkpoint the TCs when checkpointing a...
2019-12-27 Gabe Blackfastmodel: Handle "special" vector regs without calling...
2019-12-24 Gabe Blackfastmodel: Implement readVecRegFlat for ArmThreadContext.
2019-12-24 Gabe Blackfastmodel: Determine what space to use for breakpoints...
2019-12-23 Gabe Blackfastmodel: Implement PC based events.
2019-12-20 Jui-min Leearch-arm: Fix clang warnings
2019-12-19 AdriĆ  Armejacharch-arm: Fix decoding of LDFF1x scalar plus scalar
2019-12-18 Adrian Herreraarch-arm: Semihosting, fix SYS_FLEN
2019-12-18 Adrian Herreraarch-arm: Secure EL2 checking
2019-12-18 Adrian Herreraarch-arm: AArch64 trap check, arbitrary ECs/Imms
2019-12-17 Gabe Blackfastmodel: Tell fast model not to shutdown when time...
2019-12-17 Gabe Blackfastmodel: Implement port proxies.
2019-12-17 Gabe Blackfastmodel: Create a TLB model which uses IRIS to do...
2019-12-17 Gabe Blackfastmodel: Add an address translation mechanism to...
2019-12-17 Gabe Blackfastmodel: Add a header for IRIS MSN constants.
2019-12-11 Giacomo Travagliniarch-arm: Always initialize SVE memData
2019-12-11 Giacomo Travagliniarch-arm: Avoid creating an empty byteEnable vector
2019-12-10 Gabe Blacksim,arch: Collapse the ISA specific versions of m5Syscall.
2019-12-10 Gabe Blackarch,cpu,sim: Push syscall number determination up...
2019-12-10 Gabe Blackarch: Get rid of the now unused setSyscallArg.
2019-12-10 Gabe Blackarch: Use ignoreWarnOnceFunc instead of the WarnOnce...
2019-12-10 Giacomo Travagliniarch-arm: Disambuiguate NumFloatV7ArchRegs usage
2019-12-10 Giacomo Travagliniarch-arm: Unify VLdmStm behaviour when reg out of index
2019-12-10 Giacomo Travagliniarch-arm: Fix NumVecV7ArchRegs value (64->16)
2019-12-10 Giacomo Travagliniarch-arm: Reorder arch/arm/registers.hh constants
2019-12-10 Giacomo Travagliniarch-arm: Replace NumFloatV8ArchRegs with NumVecV8ArchRegs
2019-12-06 Gabe Blackkvm,arm: Update the KVM ARM v8 CPU to use vector regs.
2019-12-03 Gabe Blackfastmodel: Switch the diagnostic pragmas to GCC from...
2019-12-03 Gabe Blacksystemc,fastmodel: Use the gem5_scons error and warning...
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