arch: Bump MaxVecRegLenInBytes to 4096
[gem5.git] / src / arch / power / insts /
2018-03-26 Gabe Blackarch: Fix all override related warnings.
2018-03-26 Gabe Blackarch: Add a virtual asBytes function to the StaticInst...
2017-12-13 Gabe Blackcpu,alpha,mips,power,riscv,sparc: Get rid of eaComp...
2017-07-05 Rekai Gonzalez-Alb... cpu: Simplify the rename interface and use RegId
2017-07-05 Nathanael Premillieuarch, cpu: Architectural Register structural indexing
2016-11-09 Brandon Potterstyle: [patch 1/22] use /r/3648/ to reorganize includes
2015-07-28 Nilay Vaishrevert 5af8f40d8f2c
2015-07-26 Nilay Vaishcpu: implements vector registers
2013-10-15 Yasuko Eckertcpu: add a condition-code register class
2013-10-15 Steve Reinhardtcpu: clean up architectural register classification
2013-02-19 Andreas Hanssonscons: Add warning for overloaded virtual functions
2011-04-15 Nathan Binkertincludes: sort all includes
2011-01-03 Steve ReinhardtMake commenting on close namespace brackets consistent.
2010-10-31 Gabe BlackISA,CPU,etc: Create an ISA defined PC type that abstrac...
2010-09-14 Gabe BlackCPU: Trim unnecessary includes from some common files.
2010-01-19 Derek Howermerge
2009-10-27 Timothy M. JonesPOWER: Add support for the Power ISA