2020-11-16 |
Bobby R. Bruce | misc: Merge branch hotfix v20.1.0.2 branch into develop |
tree | commitdiff |
2020-11-06 |
Gabe Black | arch,cpu: Enforce using accessors to get at src/destRegIdx. |
tree | commitdiff |
2020-10-30 |
Gabe Black | misc: Delete the now unnecessary create methods. |
tree | commitdiff |
2020-10-29 |
Gabe Black | arch,sim: Handle KVM SE page faults with workload events. |
tree | commitdiff |
2020-10-29 |
Gabe Black | riscv: Implement an SE workload for Linux. |
tree | commitdiff |
2020-10-27 |
Giacomo Travaglini | arch-riscv: Replace any getDTBPtr/getITBPtr usage |
tree | commitdiff |
2020-10-21 |
Gabe Black | misc: Fix a few accidental transitive includes. |
tree | commitdiff |
2020-10-21 |
Giacomo Travaglini | misc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB |
tree | commitdiff |
2020-10-14 |
Gabe Black | misc: Standardize the way create() constructs SimObjects. |
tree | commitdiff |
2020-10-07 |
Giacomo Travaglini | arch: Add generic BaseMMU |
tree | commitdiff |
2020-10-01 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.1.0.0' into... |
tree | commitdiff |
2020-09-28 |
Gabe Black | misc: Update attribute syntax, and reorganize compiler.hh. |
tree | commitdiff |
2020-09-25 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.1.0.0' into... |
tree | commitdiff |
2020-09-22 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.1.0.0' into... |
tree | commitdiff |
2020-09-20 |
Gabe Black | arch,cpu,sim: Route system calls through the workload. |
tree | commitdiff |
2020-09-17 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.1.0.0' into... |
tree | commitdiff |
2020-09-16 |
Gabe Black | arch,cpu: Get rid of the IsMemRef StaticInst flag. |
tree | commitdiff |
2020-09-16 |
Gabe Black | arch,cpu: Rearrange StaticInst flags for memory barriers. |
tree | commitdiff |
2020-09-15 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.1.0.0' into... |
tree | commitdiff |
2020-09-14 |
Andreas Sandberg | base, sim, mem, arch: Remove the dummy CPU in NULL |
tree | commitdiff |
2020-09-10 |
Shivani Parekh | misc: Replaced master/slave terminology |
tree | commitdiff |
2020-09-08 |
Andreas Sandberg | base, sim: Make ByteOrder into a ScopedEnum accessible... |
tree | commitdiff |
2020-09-02 |
Gabe Black | misc: Remove the "fault" parameter from syscall functions. |
tree | commitdiff |
2020-08-28 |
Gabe Black | misc: Clean up usage of arch/isa_traits.hh. |
tree | commitdiff |
2020-08-28 |
Ian Jiang | arch-riscv: Fix disassembling of jalr |
tree | commitdiff |
2020-08-28 |
Gabe Black | riscv: Remove unnecessary includes from arch/riscv... |
tree | commitdiff |
2020-08-26 |
Emily Brickey | arch: update port terminology |
tree | commitdiff |
2020-08-25 |
Gabe Black | arch,cpu,sim: Get rid of the microcode ROM stub code. |
tree | commitdiff |
2020-08-24 |
Emily Brickey | arch-riscv, arch-x86: convert tlb to new style stats |
tree | commitdiff |
2020-08-21 |
Ian Jiang | arch-riscv: Add float registers in copyRegs |
tree | commitdiff |
2020-08-20 |
Gabe Black | arch: Eliminate the unused HasUnalignedMemAcc constant. |
tree | commitdiff |
2020-08-20 |
Gabe Black | arch: Eliminate an unused pair of constants from isa_tr... |
tree | commitdiff |
2020-08-20 |
Gabe Black | arch: Create a base class for decoders. |
tree | commitdiff |
2020-08-19 |
Ian Jiang | arch-riscv: Fix disassembling of CSR instructions |
tree | commitdiff |
2020-08-18 |
Ian Jiang | arch-riscv: Fix disassembling of all register instructions |
tree | commitdiff |
2020-08-05 |
Gabe Black | arch: Use VPtr for uname. |
tree | commitdiff |
2020-08-01 |
Ian Jiang | arch-riscv: Fix disassembling of float register instruc... |
tree | commitdiff |
2020-07-11 |
Gabe Black | arch,cpu: Consolidate most of the StackTrace classes... |
tree | commitdiff |
2020-07-07 |
Gabe Black | arch: Delete the unused ProcessInfo class. |
tree | commitdiff |
2020-07-04 |
Bobby R. Bruce | misc: Merged m5ops_base hotfix into develop |
tree | commitdiff |
2020-06-17 |
Gabe Black | arch,cpu,sim: Eliminate the now empty kernel statistics... |
tree | commitdiff |
2020-06-12 |
Gabe Black | arch,cpu: Add a setThreadContext method to the ISA... |
tree | commitdiff |
2020-06-11 |
Gabe Black | arch,cpu: Change setCPU to setThreadContext in Interrupts. |
tree | commitdiff |
2020-06-09 |
Gabe Black | arch,cpu,dev,sim,mem: Collect System thread elements... |
tree | commitdiff |
2020-06-09 |
Gabe Black | arch,base,cpu,kerm,sim: Build a symbol table for object... |
tree | commitdiff |
2020-06-08 |
Bobby R. Bruce | misc: Merge hotfix v20.0.0.2 into develop |
tree | commitdiff |
2020-06-02 |
Bobby R. Bruce | misc: Merge branch version update into develop |
tree | commitdiff |
2020-06-02 |
Bobby R. Bruce | misc: Merge in 'hotfix-m5-tick-rounding-error' |
tree | commitdiff |
2020-05-28 |
Bobby R. Bruce | Merge branch 'release-staging-v20.0.0.0' into develop |
tree | commitdiff |
2020-05-28 |
Bobby R. Bruce | misc: Merge branch 'release-staging-v20.0.0.0' into... |
tree | commitdiff |
2020-05-27 |
Bobby R. Bruce | arch-riscv,misc: Added M5_VAR_USED to MiscRegNames |
tree | commitdiff |
2020-05-19 |
Gabe Black | arch,base,cpu,kern,sim: Encapsulate symbols in a class. |
tree | commitdiff |
2020-05-11 |
Ayaz Akram | arch-riscv,tests: small update to make gem5.fast compile |
tree | commitdiff |
2020-05-02 |
Nils Asmussen | arch-riscv: be prepared for CSR changes during PT walk. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: report that we don't have debugging support. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: respect IALIGN, influenced by toggling... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: let FPU instructions fault if status.FS... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: make uret,sret,mret SerializeAfter,NonSpecu... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: make accesses to CSRs SerializeAfter. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: fault according to status.{TVM,TSK,TW}. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: added dummy implementation of wfi instruction. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: fault on mstatus accesses from lower privil... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: ignore writes to SXL/UXL fields in status... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: added (un)serialization of miscRegFile. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: show names of MiscRegs on accesses. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: fixed read of {M,S,U}TVEC. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: fixed formatting. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: implement RemoteGDB::acc for FS mode. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: implement sfence.vma to flush TLBs. |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: make sure only supported modes can be set... |
tree | commitdiff |
2020-04-29 |
Nils Asmussen | arch-riscv: added TLB and page table walker. |
tree | commitdiff |
2020-04-22 |
Gabe Black | base,arch,sim,cpu: Move object file loader components... |
tree | commitdiff |
2020-04-22 |
Gabe Black | configs,arch,sim: Move fixFuncEventAddr into the Worklo... |
tree | commitdiff |
2020-04-22 |
Gabe Black | arch,sim,kern,dev,cpu: Create a Workload SimObject. |
tree | commitdiff |
2020-03-27 |
Gabe Black | riscv: Fix RISCV builds by updating its use of pseudoIn... |
tree | commitdiff |
2020-03-26 |
Nils Asmussen | arch-riscv: print information about faults. |
tree | commitdiff |
2020-03-26 |
Nils Asmussen | arch-riscv: added support for pseudo instructions. |
tree | commitdiff |
2020-03-25 |
Matthew Poremba | sim-se: Switch to new MemState API |
tree | commitdiff |
2020-03-25 |
Matthew Poremba | sim-se: Extend MemState API to use VMAs |
tree | commitdiff |
2020-03-20 |
Gabe Black | arch,sim: Merge Process::syscall and Process::getDesc. |
tree | commitdiff |
2020-03-20 |
Gabe Black | arch,sim: Drop the syscall number from the syscall... |
tree | commitdiff |
2020-03-20 |
Gabe Black | arch,sim: Create a common structure to hold syscall... |
tree | commitdiff |
2020-03-19 |
Gabe Black | arch,cpu,mem,sim: Reimplement the SE translating proxy... |
tree | commitdiff |
2020-03-19 |
Gabe Black | arch: Eliminate vtophys and its switching header file. |
tree | commitdiff |
2020-03-19 |
Gabe Black | riscv: Implement translateFunctional. |
tree | commitdiff |
2020-03-17 |
Gabe Black | kern,arch: Refactor SkipFuncEvent to not use skipFunction. |
tree | commitdiff |
2020-03-12 |
Gabe Black | arch,sim: Get rid of the now unused setSyscallReturn... |
tree | commitdiff |
2020-03-12 |
Gabe Black | sim: Get rid of the now unused getSyscallArg method. |
tree | commitdiff |
2020-03-12 |
Gabe Black | riscv: Use a riscv specific GuestABI for riscv system... |
tree | commitdiff |
2020-03-12 |
Gabe Black | riscv: Convert RISCV specific syscalls to Guest ABI. |
tree | commitdiff |
2020-03-12 |
Gabe Black | arch,sim: Convert clone to GuestABI and define a cloneB... |
tree | commitdiff |
2020-03-11 |
Gabe Black | config,arch,cpu,kern,sim: Extract kernel information... |
tree | commitdiff |
2020-03-10 |
Giacomo Travaglini | misc: string.join has been removed in python3 |
tree | commitdiff |
2020-03-09 |
Gabe Black | arch,cpu: Get rid of unused/unimplemented vtophys variants. |
tree | commitdiff |
2020-03-04 |
Gabe Black | arch,cpu,mem: Replace the mmmapped IPR mechanism with... |
tree | commitdiff |
2020-02-26 |
Bobby R. Bruce | misc: merge branch 'release-staging-v19.0.0.0' into... |
tree | commitdiff |
2020-02-24 |
Bobby R. Bruce | misc: Merged release-staging-v19.0.0.0 into develop |
tree | commitdiff |
2020-02-19 |
Adrian Herrera | misc: pass ThreadContext on ISA clear |
tree | commitdiff |
2020-02-18 |
Gabe Black | riscv: Delete authors lists from riscv files. |
tree | commitdiff |
2020-02-11 |
Gabe Black | arch: Get rid of the generic mmapped IPR mechanism. |
tree | commitdiff |
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