arch-arm: Add initial support for SVE contiguous loads/stores
[gem5.git] / src / arch / sparc / ua2005.cc
2019-04-30 Gabe Blacksparc: Move the interrupt types out of isa_traits.hh...
2019-01-22 Gabe Blacksparc: Get rid of some register type definitions.
2019-01-22 Gabe Blackarch: cpu: Stop passing around misc registers by reference.
2018-03-27 Gabe Blacksparc: Add some missing M5_FALLTHROUGHs and breaks.
2016-11-09 Brandon Potterstyle: [patch 1/22] use /r/3648/ to reorganize includes
2015-09-30 Mitch Hayengaisa,cpu: Add support for FS SMT Interrupts
2015-09-15 Palle Lyckegaardsparc: writing to tick_cmpr should not cause a panic
2012-08-28 Andreas HanssonClock: Add a Cycles wrapper class and use where applicable
2012-02-11 Gabe BlackSPARC: Make PSTATE and HPSTATE a BitUnion.
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Gabe BlackMerge with main repository.
2012-01-29 Gabe BlackYet another merge with the main repository.
2012-01-28 Gabe BlackMerge with the main repo.
2012-01-16 Gabe BlackMerge yet again with the main repository.
2012-01-07 Gabe BlackAnother merge with the main repository.
2012-01-07 Gabe BlackMerge with the main repository again.
2012-01-07 Gabe BlackMerge with main repository.
2011-10-31 Gabe BlackSE/FS: Remove the last uses of FULL_SYSTEM from SPARC.
2011-10-10 Gabe Black[mq]: sefssparcregfile.patch
2011-04-15 Nathan Binkerttrace: reimplement the DTRACE function so it doesn...
2011-01-08 Steve ReinhardtReplace curTick global variable with accessor functions.
2010-11-11 Gabe BlackSPARC: Clean up some historical style issues.
2009-07-13 Derek Howermerge
2009-07-10 Gabe BlackSPARC: Fold the MiscRegFile all the way into the ISA...
2009-04-15 Steve ReinhardtGet rid of the Unallocated thread context state.
2009-04-06 Gabe BlackMerge ARM into the head. ARM will compile but may not...
2009-02-25 Gabe BlackISA: Get rid of the get*RegName functions.
2008-11-06 Lisa HsuAutomated merge with ssh://daystrom.m5sim.org//repo/m5
2008-11-05 Lisa HsuAutomated merge with ssh://m5sim.org//repo/m5
2008-11-05 Nathan BinkertFix a few more places where the context stuff wasn...
2008-11-03 Lisa HsuAdd in Context IDs to the simulator. From now on,...
2008-11-03 Lisa Hsumake BaseCPU the provider of _cpuId, and cpuId() instea...
2008-10-21 Nathan Binkertstyle: Use the correct m5 style for things relating...
2008-10-09 Nathan Binkerteventq: convert all usage of events to use the new...
2008-08-11 Nathan Binkertstyle
2007-10-31 Steve ReinhardtMerge in bus DPRINTF changes.
2007-10-03 Gabe BlackMerge with head.
2007-09-28 Ali SaidiRename cycles() function to ticks()
2007-04-03 Ali SaidiMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2007-03-27 Ron DreslinskiMerge zizzer:/bk/newmem
2007-03-23 Kevin LimMerge ktlim@zizzer:/bk/newmem
2007-03-15 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-13 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-13 Ali Saidifix interrupting during a quisce on sparc
2007-03-12 Ron DreslinskiMerge zizzer:/bk/newmem
2007-03-12 Ali SaidiMerge zizzer:/bk/newmem
2007-03-12 Ali Saidimove hver code to ua2005.cc
2007-03-09 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-09 Ali SaidiMerge zizzer:/bk/newmem
2007-03-09 Ali Saidiimplement ipi stufff for SPARC
2007-03-08 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-08 Ali SaidiI missed a couple of WithEffects, this should do it
2007-03-07 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-07 Ali SaidiMerge zizzer:/bk/newmem
2007-03-07 Ali Saidi*MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg
2007-03-06 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-05 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-04 Ali SaidiMerge zizzer:/bk/newmem
2007-03-03 Ali SaidiImplement Niagara I/O interface and rework interrupts
2007-01-27 Gabe BlackMerge zizzer:/bk/newmem
2007-01-26 Ali SaidiMerge zizzer:/bk/newmem
2007-01-26 Ali SaidiMerge zizzer:/bk/newmem
2007-01-26 Ali SaidiMerge zeep.pool:/z/saidi/work/m5.newmem
2007-01-26 Lisa HsuMerge zizzer:/bk/newmem
2007-01-26 Lisa Hsueliminate cpu checkInterrupts bool, it is redundant...
2007-01-23 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-01-23 Ali Saidiclean up fault code a little bit
2007-01-22 Ali SaidiMerge zizzer:/bk/newmem
2007-01-20 Lisa HsuMerge zed.eecs.umich.edu:/.automount/zeep/z/saidi/work...
2007-01-20 Lisa Hsusome hstick and hintp changes.
2007-01-11 Lisa HsuMerge zed.eecs.umich.edu:/z/hsul/work/sparc/ali.m5
2007-01-11 Lisa Hsuua2005.cc:
2007-01-11 Lisa Hsuua2005.cc:
2007-01-10 Ali Saidiquiet/remove some warnings
2007-01-08 Lisa Hsuthe way i understand it, interrupts in m5 is a little...
2007-01-08 Ali Saidifix softint and partially implement hstick interrupts...
2007-01-05 Ali Saidiset the softint appropriately on an timer compare interrupt
2007-01-05 Ali SaidiMerge zizzer:/bk/newmem
2007-01-05 Ali SaidiFix stick compare to work correctly and set checkInterr...
2006-12-16 Gabe BlackMerge zizzer:/bk/newmem
2006-12-15 Lisa HsuMerge zizzer:/bk/newmem
2006-12-15 Lisa HsuMerge zizzer:/bk/sparcfs
2006-12-13 Lisa HsuMerge zizzer:/bk/newmem
2006-12-13 Lisa HsuMerge zizzer:/bk/newmem
2006-12-13 Lisa HsuMerge zizzer:/bk/sparcfs
2006-12-13 Lisa HsuMerge zizzer:/bk/newmem
2006-12-09 Ali Saidifix lisa's hand merge
2006-12-09 Ali SaidiMerge zizzer:/bk/sparcfs
2006-12-08 Lisa HsuMerge zizzer:/bk/sparcfs
2006-12-08 Lisa Hsumostly implemented SOFTINT relevant interrupt stuff.
2006-12-07 Ali Saidiget legion/m5 to first tlb miss fault
2006-12-05 Gabe BlackMerge zizzer:/bk/sparcfs
2006-12-05 Lisa HsuMerge zizzer:/bk/sparcfs
2006-12-05 Ali Saidireogranize code to split off FS only misc regs with...
2006-10-01 Kevin LimMerge ktlim@zamp:./local/clean/o3-merge/m5
2006-08-15 Ron DreslinskiMerge zizzer:/z/m5/Bitkeeper/newmem
2006-08-15 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-08-14 Steve ReinhardtFix up doxygen.
2006-07-06 Ali SaidiMerge zizzer:/bk/newmem
2006-06-12 Gabe BlackMerge m5.eecs.umich.edu:/bk/newmem
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