X86: Implement some SSE fp microops and instructions.
[gem5.git] / src / arch / x86 / insts /
2007-09-05 Gabe BlackX86: Add floating point micro registers.
2007-08-28 Gabe BlackMerge with head.
2007-08-27 Gabe BlackX86: Remove x86 code that attempted to fix misaligned...
2007-08-12 Nathan Binkertmerge
2007-08-07 Gabe BlackMerge with head.
2007-08-07 Gabe BlackX86: Added some missing parenthesis in the condition...
2007-08-07 Gabe BlackX86: Implemented and hooked in SCAS (scan string)
2007-08-05 Gabe BlackMerge with head.
2007-08-05 Gabe BlackX86: Make 64 bit unaligned accesses work as well as...
2007-08-02 Ali Saidimerge, no manual changes
2007-08-01 Gabe BlackMerge with head.
2007-08-01 Gabe BlackMerge with head.
2007-08-01 Gabe BlackX86: Hide the irrelevant portions of the address compon...
2007-07-31 Steve ReinhardtMerge from head.
2007-07-30 Gabe BlackX86: Make merge and pick work with high bytes. Fix...
2007-07-30 Gabe BlackX86: Make register names in disassembly reflect high...
2007-07-30 Gabe BlackX86: Make disassembly use the final register index...
2007-07-29 Steve ReinhardtMerge Gabe's changes from head.
2007-07-29 Gabe BlackMerge ... head. style.py was also missing an argument...
2007-07-29 Gabe BlackX86: Fix a bug with merge
2007-07-27 Nathan BinkertMerge python and x86 changes with cache branch
2007-07-27 Gabe BlackMerge with head.
2007-07-27 Gabe BlackX86: Add functions to read and write to an exec context.
2007-07-22 Steve ReinhardtMerge more changes in from head.
2007-07-22 Steve ReinhardtMerge Gabe's changes with mine.
2007-07-22 Gabe BlackMerge with head.
2007-07-20 Gabe BlackFixed width parameter and provided a parameter to flip...
2007-07-18 Gabe BlackMake disassembled x86 register indices reflect their...
2007-07-17 Gabe BlackAdd in support for condition code flags.
2007-07-15 Gabe BlackPull some hard coded base classes out of the isa descri...