x86: add op class for int and fp microops in isa description
[gem5.git] / src / arch / x86 / isa / insts / x87 /
2013-03-11 Nilay Vaishx86: implement some of the x87 instructions
2013-01-15 Nilay Vaishx86: implements fsin, fcos instructions
2013-01-15 Nilay Vaishx86: implement fabs, fchs instructions
2012-12-30 Nilay Vaishx86: implement x87 fp instruction fnstsw
2012-12-30 Nilay Vaishx86: implement x87 fp instruction fsincos
2010-05-24 Nathan Binkertcopyright: Change HP copyright on x86 code to be more...
2009-08-25 Derek Howermerge
2009-08-25 Derek HowerAutomated merge with ssh://hg@m5sim.org/m5
2009-08-20 Gabe BlackX86: Fix the decoding for and fill out FST and FSTP.
2007-10-31 Steve ReinhardtMerge in bus DPRINTF changes.
2007-10-03 Gabe BlackMerge with head.
2007-10-03 Gabe BlackX86: Fix x87 floating point stack register indexing.
2007-10-03 Gabe BlackX86: Fix up the microcode for the FST and FSTP instruct...
2007-09-20 Gabe BlackX86: Implement the fld, fst, and fstp instructions.
2007-09-20 Gabe BlackX86: Put in stubs for x87, 64 bit and 128 bit SIMD...