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mem-cache: Add multiple eviction stats
[gem5.git]
/
src
/
arch
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x86
/
isa.cc
2020-01-14
Gabe Black
x86: Move miscreg initialization to the ISA class.
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2019-01-31
Gabe Black
x86: Stop using/defining some ISA specific register...
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2018-05-08
Matt Sinclair
arch-x86, arch-power: fix calls to bits and insertBits
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2017-12-22
Gabe Black
arch,cpu: "virtualize" the TLB interface.
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2017-12-14
Jason Lowe-Power
misc: Updates for gcc7.2 for x86
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2017-12-06
Gabe Black
x86: Split apart x87's FSW and TOP, and add a missing...
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2016-11-09
Brandon Potter
style: [patch 1/22] use /r/3648/ to reorganize includes
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2016-02-07
Steve Reinhardt
x86: create function to check miscreg validity
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2015-07-07
Andreas Sandberg
sim: Refactor the serialization base class
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2015-07-04
Nikos Nikoleris
x86: Adjust the size of the values written to the x87...
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2015-02-16
Andreas Hansson
arch: Make readMiscRegNoEffect const throughout
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2013-01-13
Nilay Vaish
x86: Changes to decoder, corrects 9376
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2013-01-07
Andreas Sandberg
arch: Move the ISA object to a separate section
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2013-01-07
Andreas Sandberg
arch: Add support for invalidating TLBs when draining
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2013-01-07
Andreas Sandberg
arch: Make the ISA class inherit from SimObject
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2013-01-05
Gabe Black
X86: Move address based decode caching in front of...
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2012-12-30
Nilay Vaish
x86: implement x87 fp instruction fnstsw
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2010-08-17
Steve Reinhardt
x86: minor checkpointing bug fixes
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2010-01-19
Derek Hower
merge
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2009-11-05
Nathan Binkert
build: fix compile problems pointed out by gcc 4.4
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2009-07-18
Derek Hower
merge
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2009-07-17
Gabe Black
X86: Shift some register flattening work into the decoder.
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2009-07-13
Derek Hower
merge
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2009-07-10
Gabe Black
X86: Fold the MiscRegFile all the way into the ISA...
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2009-07-09
Gabe Black
Registers: Add an ISA object which replaces the MiscReg...
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