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kern,sim: implement FUTEX_WAKE_OP
[gem5.git] / src / arch /
2019-02-08 Tuan Tariscv: fixed syscall return value tree | commitdiff
2019-02-08 Tuan Tariscv: ignore nanosleep syscall tree | commitdiff
2019-02-08 Tuan Taarch-riscv: initialize RISC-V's thread pointer register... tree | commitdiff
2019-02-08 Giacomo Travagliniarch-arm: Fix Virtual interrupts in AArch64 tree | commitdiff
2019-02-08 Giacomo Travagliniarch-arm: Fix extra comma in b7ce897f1e9545785bde982f72... tree | commitdiff
2019-02-08 Giacomo Travagliniarch-arm: Allow ArmPPI usage for PMU tree | commitdiff
2019-02-08 Ruben Ayrapetyanarch-arm: Fix initialization of PMU counters tree | commitdiff
2019-02-07 Austin Harrisarch-riscv: Enable support for riscv 32-bit in SE mode. tree | commitdiff
2019-02-06 Tuan Tariscv: remove NonSpeculative flag from fence inst tree | commitdiff
2019-02-06 Tuan Taarch-riscv: Initialize interrupt mask tree | commitdiff
2019-02-05 Andrea Mondellimisc: added missing override specifier tree | commitdiff
2019-02-05 Austin Harrisriscv: Get rid of ISA specific register types in Interr... tree | commitdiff
2019-02-01 Gabe Blackcpu, arch: Replace the CCReg type with RegVal. tree | commitdiff
2019-01-31 Gabe Blackpower: Get rid of some ISA specific register types. tree | commitdiff
2019-01-31 Gabe Blacknull: Get rid of some register type definitions. tree | commitdiff
2019-01-31 Gabe Blackmips: Stop using architecture specific register types. tree | commitdiff
2019-01-31 Gabe Blackalpha: Stop using architecture specific register types. tree | commitdiff
2019-01-31 Gabe Blackx86: Stop using/defining some ISA specific register... tree | commitdiff
2019-01-31 Gabe Blackriscv: Get rid of some ISA specific register types. tree | commitdiff
2019-01-31 Gabe Blackarch: cpu: Rename *FloatRegBits* to *FloatReg*. tree | commitdiff
2019-01-30 Giacomo Gabrielliarch,cpu: Add vector predicate registers tree | commitdiff
2019-01-30 Giacomo Travagliniarch-arm, configs: Create single instance of DTB autoge... tree | commitdiff
2019-01-25 Giacomo Travagliniarch-arm: Remove floatReg operand type tree | commitdiff
2019-01-25 Giacomo Travagliniarch-arm: Use VecElem instead of FloatReg for FP instru... tree | commitdiff
2019-01-25 Giacomo Travagliniarch: Fix VecElem Operand generation in ISA parser tree | commitdiff
2019-01-25 Giacomo Travaglinicpu, arch, arch-arm: Wire unused VecElem code in the... tree | commitdiff
2019-01-25 Giacomo Travagliniarch-arm: Inital vector rename mode depending on A32/A64 tree | commitdiff
2019-01-25 Giacomo Travagliniarch-arm: Remove unused float operands tree | commitdiff
2019-01-25 Giacomo Travagliniarch: Provide traceback when parsing ISA code tree | commitdiff
2019-01-24 Gabe Blackhsail: Remove the MiscReg type. tree | commitdiff
2019-01-24 Gabe Blackbase: arch: Get rid of the now unused FloatRegVal type. tree | commitdiff
2019-01-23 Giacomo Travagliniarch-arm: Implement LoadAcquire/StoreRelease in AArch32 tree | commitdiff
2019-01-23 Giacomo Travagliniarch-arm: IsStoreConditional flag set depending on... tree | commitdiff
2019-01-23 Giacomo Travagliniarch-arm: Remove SWP and SWPB instructions tree | commitdiff
2019-01-23 Gabe Blackarm: Replace MiscReg with RegVal in utility.(hh|cc). tree | commitdiff
2019-01-22 Gabe Blacksparc: Get rid of some register type definitions. tree | commitdiff
2019-01-22 Gabe Blackarch: cpu: Stop passing around misc registers by reference. tree | commitdiff
2019-01-22 Gabe Blackarm: Get rid of some register type definitions. tree | commitdiff
2019-01-22 Ciro Santilliarch-arm: implement the GDB XML target description... tree | commitdiff
2019-01-22 Giacomo Travagliniarch-arm: Move AArch32 IMPLEMENTATION DEFINED registers tree | commitdiff
2019-01-22 Brandon Pottersim-se add readv and modifies writev tree | commitdiff
2019-01-22 Brandon Pottersim-se: add ability to get/set sock metadata tree | commitdiff
2019-01-22 Brandon Pottersim-se: add syscalls related to polling tree | commitdiff
2019-01-22 Brandon Pottersim-se: add calls for network transmissions tree | commitdiff
2019-01-22 Brandon Pottersim-se: add socket-based functionality tree | commitdiff
2019-01-16 Gabe Blackcpu: dev: sim: gpu-compute: Banish some ISA specific... tree | commitdiff
2019-01-16 Gabe Blackarch: Make the ISA register types aliases for the globa... tree | commitdiff
2019-01-16 Gabe Blackarm: Make the fp register types 64 bits. tree | commitdiff
2019-01-16 Giacomo Travagliniarch-arm: Read VMPIDR instead of MPIDR when EL2 is... tree | commitdiff
2019-01-16 Anouk Van Laerarch-arm: Added TLBI_ALL EL2 instruction tree | commitdiff
2019-01-16 Alec Roelkearch-riscv: Add interrupt handling tree | commitdiff
2019-01-16 Alec Roelkearch-riscv: Fix reset function and style tree | commitdiff
2019-01-15 Giacomo Travagliniarch-arm: Fix usage of RegId constructor for VecElem tree | commitdiff
2019-01-14 Gabe Blackarm: Stop using the FloatReg and FloatRegBits types. tree | commitdiff
2019-01-10 Javier Setoainsim-se, arch-arm: Add support for getdents64 tree | commitdiff
2019-01-10 Andreas Sandbergarch-arm, sim-se: Add support for TLS in clone tree | commitdiff
2019-01-10 Andreas Sandbergarch-arm, sim-se: Fix incorrect SP handling in clone tree | commitdiff
2019-01-10 Andreas Sandbergsim-se: Refactor clone to avoid most ifdefs tree | commitdiff
2019-01-10 Javier Setoainarch-arm, sim-se: Wire up syscalls needed for pthreads tree | commitdiff
2019-01-10 Jairo Balartdev-arm: Add a GICv3 model tree | commitdiff
2019-01-09 Ivan Pizarroarch-arm: Additional bits in misc ARM registers to... tree | commitdiff
2019-01-03 Curtis Dunhamarm: properly handle RES0/1 for SCTLRs tree | commitdiff
2018-12-20 Gabe Blackarch, cpu: Remove float type accessors. tree | commitdiff
2018-12-19 Giacomo Travagliniarch-arm: Add Crypto in SE mode tree | commitdiff
2018-12-18 Gabe Blackarch: Make the ISA parser always use binary floating... tree | commitdiff
2018-12-05 Tony Gutierrezarch-x86: Add sys/syscall.h to x86 process.cc/syscall_e... tree | commitdiff
2018-12-03 Ciro Santilliarch-arm: correctly set floats from GDB on aarch64 tree | commitdiff
2018-12-03 Ciro Santilliarch-arm: only change the pc address when GDB registers... tree | commitdiff
2018-12-03 Ciro Santilliarch-arm: fix the aarch64 GDB stub tree | commitdiff
2018-11-28 Nikos Nikolerisarch-arm: Add missing template declaration tree | commitdiff
2018-11-28 Rekai Gonzalez-Alb... cpu,arch-arm: Initialise data members tree | commitdiff
2018-11-28 Matteo Andreozziarch-arm: clang compilation fixes tree | commitdiff
2018-11-27 Gabe Blackhsail: Fix a warning/build failure for HSAIL_X86. tree | commitdiff
2018-11-27 Gabe Blackarch, base, cpu, gpu, mem: Replace assert(0 or false... tree | commitdiff
2018-11-27 Ciro Santillisim-se: only implement getdentsFunc on supported hosts tree | commitdiff
2018-11-21 Gabe Blackx86: Get rid of a problematic DPRINTF in PremFp. tree | commitdiff
2018-11-14 Giacomo Travagliniarch-arm: Print register name when warning on AT instru... tree | commitdiff
2018-11-07 Giacomo Travagliniarch-arm: Deprecate usage of legacy bootloader patching tree | commitdiff
2018-11-07 Giacomo Travagliniarch-arm: ArmSystem::resetAddr64 renamed to be used... tree | commitdiff
2018-11-07 Giacomo Travagliniarch-arm: Implement AArch32 RVBAR tree | commitdiff
2018-11-07 Giacomo Travagliniarch-arm: Remove SCTLR.VE bit tree | commitdiff
2018-11-07 Giacomo Travagliniarch-arm: Refactor ISA::clear by adding a ISA::clear32... tree | commitdiff
2018-11-07 Giacomo Travagliniarch-arm: Remove MISCREG commented numbers tree | commitdiff
2018-11-06 Gabe Blackmips: Change the integer and fp register widths to... tree | commitdiff
2018-11-06 Gabe Blackmips: Clean up type overrides for operands. tree | commitdiff
2018-11-06 Gabe Blackmips: Explicitly truncate the syscall return value... tree | commitdiff
2018-11-05 Gabe Blacknull: Claim to use 64 bit floating point registers. tree | commitdiff
2018-11-05 Gabe Blacksparc: Switch the FloatReg and FloatRegBits types to... tree | commitdiff
2018-11-05 Anouk Van Laerarch, arm: Return s1Req upon fault in s2Lookup tree | commitdiff
2018-11-05 Anouk Van Laerarch, arm: Effect of AT instructions on descriptor... tree | commitdiff
2018-10-29 Ciro Santillisyscall_emul: implement arm openat tree | commitdiff
2018-10-29 Yuetsu Kodamaarch-arm: FIXUP for the add PRFM PST instruction commit tree | commitdiff
2018-10-26 yuetsu.kodamaarch-arm: We add PRFM PST instruction for arm tree | commitdiff
2018-10-26 Giacomo Travagliniarch-arm: IMPDEF for SYS instruction with CRn = {11... tree | commitdiff
2018-10-26 Giacomo Travagliniarch-arm: AArch64 Instruction for MISCREG_IMPDEF_UNIMPL tree | commitdiff
2018-10-26 Giacomo Travagliniarch-arm: Refactor AArch64 MSR/MRS trapping tree | commitdiff
2018-10-26 Giacomo Travagliniarch-arm: Trap to EL2 only if not in Secure State tree | commitdiff
2018-10-26 Giacomo Travagliniarch-arm: Fix HVC trapping beahviour tree | commitdiff
2018-10-26 Giacomo Travagliniarch-arm: CPTR_EL3.TCPAC traps EL2 accesses to CPACR_EL1 tree | commitdiff
2018-10-19 Ciro Santilliarm: treat aarch64 hints as NOPs instead of panic tree | commitdiff
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