mem-cache: virtual address support for prefetchers
[gem5.git] / src / arch /
2019-01-16 Giacomo Travagliniarch-arm: Read VMPIDR instead of MPIDR when EL2 is...
2019-01-16 Anouk Van Laerarch-arm: Added TLBI_ALL EL2 instruction
2019-01-16 Alec Roelkearch-riscv: Add interrupt handling
2019-01-16 Alec Roelkearch-riscv: Fix reset function and style
2019-01-15 Giacomo Travagliniarch-arm: Fix usage of RegId constructor for VecElem
2019-01-14 Gabe Blackarm: Stop using the FloatReg and FloatRegBits types.
2019-01-10 Javier Setoainsim-se, arch-arm: Add support for getdents64
2019-01-10 Andreas Sandbergarch-arm, sim-se: Add support for TLS in clone
2019-01-10 Andreas Sandbergarch-arm, sim-se: Fix incorrect SP handling in clone
2019-01-10 Andreas Sandbergsim-se: Refactor clone to avoid most ifdefs
2019-01-10 Javier Setoainarch-arm, sim-se: Wire up syscalls needed for pthreads
2019-01-10 Jairo Balartdev-arm: Add a GICv3 model
2019-01-09 Ivan Pizarroarch-arm: Additional bits in misc ARM registers to...
2019-01-03 Curtis Dunhamarm: properly handle RES0/1 for SCTLRs
2018-12-20 Gabe Blackarch, cpu: Remove float type accessors.
2018-12-19 Giacomo Travagliniarch-arm: Add Crypto in SE mode
2018-12-18 Gabe Blackarch: Make the ISA parser always use binary floating...
2018-12-05 Tony Gutierrezarch-x86: Add sys/syscall.h to x86 process.cc/syscall_e...
2018-12-03 Ciro Santilliarch-arm: correctly set floats from GDB on aarch64
2018-12-03 Ciro Santilliarch-arm: only change the pc address when GDB registers...
2018-12-03 Ciro Santilliarch-arm: fix the aarch64 GDB stub
2018-11-28 Nikos Nikolerisarch-arm: Add missing template declaration
2018-11-28 Rekai Gonzalez-Alb... cpu,arch-arm: Initialise data members
2018-11-28 Matteo Andreozziarch-arm: clang compilation fixes
2018-11-27 Gabe Blackhsail: Fix a warning/build failure for HSAIL_X86.
2018-11-27 Gabe Blackarch, base, cpu, gpu, mem: Replace assert(0 or false...
2018-11-27 Ciro Santillisim-se: only implement getdentsFunc on supported hosts
2018-11-21 Gabe Blackx86: Get rid of a problematic DPRINTF in PremFp.
2018-11-14 Giacomo Travagliniarch-arm: Print register name when warning on AT instru...
2018-11-07 Giacomo Travagliniarch-arm: Deprecate usage of legacy bootloader patching
2018-11-07 Giacomo Travagliniarch-arm: ArmSystem::resetAddr64 renamed to be used...
2018-11-07 Giacomo Travagliniarch-arm: Implement AArch32 RVBAR
2018-11-07 Giacomo Travagliniarch-arm: Remove SCTLR.VE bit
2018-11-07 Giacomo Travagliniarch-arm: Refactor ISA::clear by adding a ISA::clear32...
2018-11-07 Giacomo Travagliniarch-arm: Remove MISCREG commented numbers
2018-11-06 Gabe Blackmips: Change the integer and fp register widths to...
2018-11-06 Gabe Blackmips: Clean up type overrides for operands.
2018-11-06 Gabe Blackmips: Explicitly truncate the syscall return value...
2018-11-05 Gabe Blacknull: Claim to use 64 bit floating point registers.
2018-11-05 Gabe Blacksparc: Switch the FloatReg and FloatRegBits types to...
2018-11-05 Anouk Van Laerarch, arm: Return s1Req upon fault in s2Lookup
2018-11-05 Anouk Van Laerarch, arm: Effect of AT instructions on descriptor...
2018-10-29 Ciro Santillisyscall_emul: implement arm openat
2018-10-29 Yuetsu Kodamaarch-arm: FIXUP for the add PRFM PST instruction commit
2018-10-26 yuetsu.kodamaarch-arm: We add PRFM PST instruction for arm
2018-10-26 Giacomo Travagliniarch-arm: IMPDEF for SYS instruction with CRn = {11...
2018-10-26 Giacomo Travagliniarch-arm: AArch64 Instruction for MISCREG_IMPDEF_UNIMPL
2018-10-26 Giacomo Travagliniarch-arm: Refactor AArch64 MSR/MRS trapping
2018-10-26 Giacomo Travagliniarch-arm: Trap to EL2 only if not in Secure State
2018-10-26 Giacomo Travagliniarch-arm: Fix HVC trapping beahviour
2018-10-26 Giacomo Travagliniarch-arm: CPTR_EL3.TCPAC traps EL2 accesses to CPACR_EL1
2018-10-19 Ciro Santilliarm: treat aarch64 hints as NOPs instead of panic
2018-10-19 Ciro Santilliarm: update hint instruction decoding to match ARMv8.5
2018-10-18 Gabe Blacknull: Stop specifying an endianness in isa_traits.hh.
2018-10-17 Gabe Blackarch: Include some additional headers in arch/generic...
2018-10-17 Gabe Blackarch: Get rid of the unused type AnyReg.
2018-10-12 Gabe Blackarch: Explicitly specify the endianness in the generic...
2018-10-12 Gabe Blackmips: Use little endian packet accessors.
2018-10-12 Gabe Blacksparc: Use big endian packet accessors.
2018-10-12 Gabe Blackx86: Use little endian packet accessors.
2018-10-12 Ciro Santillisyscall_emul: update arm uname release to 3.7.0+
2018-10-09 Giacomo Travagliniarch-arm: Add have_crypto System parameter
2018-10-09 Giacomo Travagliniarch-arm: AArch64 Crypto AES
2018-10-09 Giacomo Travagliniarch-arm: AArch64 Crypto SHA
2018-10-09 Matt Horsnellarch-arm: AArch32 Crypto AES
2018-10-09 Matt Horsnellarch-arm: AArch32 Crypto SHA
2018-10-08 Ciro Santillidev, arm: remove the RealViewEB platform
2018-10-08 Matteo Andreozziarch-arm: Mark ArmProcess method as override
2018-10-02 Giacomo Travaglinisim-se: Set ArmProcess64 hwcaps depending on ID regs
2018-10-02 Giacomo Travaglinisim-se: Different HWCAP for ArmProcess32/64
2018-10-02 Edmund Grimley Evansarch-arm: Add FP16 support introduced by Armv8.2-A
2018-10-02 Gabor Dozsaarch: Fix unserialization of VectorReg value
2018-10-02 Edmund Grimley Evansarch-arm: Add FP16 support and other primitives to...
2018-10-01 Giacomo Travagliniarch-arm: Implement AArch64 ID regs as bitunions
2018-10-01 Giacomo Travagliniarch-arm: Implement AArch64 ID_AA64MMFR2_EL1 register
2018-10-01 Giacomo Travagliniarch-arm: Move MiscReg BitUnions into a separate header...
2018-10-01 Giacomo Travagliniarch-arm: Init AArch64 ID registers in SE mode
2018-09-28 Giacomo Travagliniarch-arm: raise/clear IRQ when writing to PMOVSCLR/SET
2018-09-19 Brandon Pottersyscall_emul: implement dir-related syscalls
2018-09-19 Brandon Pottersyscall_emul: expand AuxVector class
2018-09-13 Earl OuFix SConstruct for asan build
2018-09-13 Anouk Van Laerarch-arm: Correction for address size in EL1&0 translation
2018-09-13 Anouk Van Laerarch-arm: Correction to address size in EL2/EL3
2018-09-12 Ciro Santillidev-arm: rename Pl390 to GicV2
2018-09-10 Giacomo Travaglinidev-arm: Factory SimObject for generating ArmInterruptPin
2018-09-10 Andreas Sandbergarm: Use the interrupt adaptor in the PMU
2018-09-10 Andreas Sandbergarm: Add support for tracking TCs in ISA devices
2018-08-21 Jason Lowe-Powermisc: Appease GCC 8
2018-08-10 Giacomo Gabrielliarm: Add support for RCpc load-acquire instructions...
2018-08-02 Andreas Sandbergarch-arm: Don't fail to initialise PMU if BP is missing
2018-07-28 Alec Roelkearch-riscv: Add xret instructions
2018-07-28 Alec Roelkearch-riscv: Add support for trap value register
2018-07-28 Alec Roelkearch-riscv: Add support for fault handling
2018-07-16 Giacomo Travagliniarch-arm: Introduce ARMv8.1 Virtual Timer System Registers
2018-07-16 Giacomo Travagliniarch-arm: Introduce RAS System Registers
2018-07-09 Robertarch-riscv: enable rudimentary fs simulation
2018-07-09 Austin Harrisarch-riscv: Fix the srlw and srliw instructions.
2018-06-28 Andreas Sandbergarch-arm: Fix incorrect t{0,1}sz field in TTBCR
2018-06-25 Matt Sinclairsyscall_emul: adding symlink system call
2018-06-25 Matt Sinclairsyscall_emul: adding link system call
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