mem-cache: Fix setting prefetch bit
[gem5.git] / src / arch /
2020-12-02 Gabe Blackx86: Let the pseudoInst dispatch function handle the...
2020-11-28 Gabe Blackpower: Convert POWER to use local reg index storage.
2020-11-26 Ciro Santilliarch-arm: add official names to all PMU events
2020-11-26 Curtis Dunhamarch-arm: Add ID_MMFR4{,EL1} system registers
2020-11-26 Bobby R. BruceMerge "misc: Merge branch hotfix v20.1.0.2 branch into...
2020-11-25 Giacomo Travagliniarch-arm: VSTCR_EL2/VSTTBR_EL2 accessible in secure...
2020-11-25 Giacomo Travagliniarch-arm: Add SECURE_RD/WR flags to miscRegInfo
2020-11-25 Ciro Santilliarch-arm: implement the aarch64 ID_ISAR6_EL1 miscregister
2020-11-24 Gabe Blackmips: Convert MIPS to use local register index storage.
2020-11-24 Gabe Blacksparc: Convert SPARC to use local register index storage.
2020-11-24 Gabe Blackx86: Convert X86 to use local reg index storage.
2020-11-24 Gabe Blackarm: Use the common pseudoInst dispatch function.
2020-11-23 Ciro Santilliarch-arm: serialize miscregs as a map
2020-11-19 Giacomo Travaglinifastmodel: Replace xrange with range to be python3...
2020-11-19 Giacomo Travaglinifastmodel: Use BaseMMU in the CortexR52 wrapper
2020-11-19 Gabe Blackarch: Add some format strings to the parser for reg...
2020-11-19 Gabe Blackx86: Fix object scope in the CPUID code.
2020-11-17 Bobby R. Brucearch-sparc,misc: Added M5_VAR_USED to SparcProcess var
2020-11-17 Kyle Roartyarch-gcn3: Explicitly sign-extend simm16
2020-11-17 Kyle Roartyarch-gcn3: Implement flat_load_sbyte instruction
2020-11-17 Kyle Roartyarch-gcn3: Implement s_setreg_imm32_b32 instruction
2020-11-17 Jordi Vaqueroarch-arm: Implementation ARMv8.1 RDMA
2020-11-17 Gabe Blackfastmodel: Wrap the PL330 DMA controller fast model.
2020-11-16 Bobby R. Brucemisc: Merge branch hotfix v20.1.0.2 branch into develop
2020-11-16 Ciro Santilliarch-arm: move serialize and unserialize definition...
2020-11-10 Boris Shingarovarch-power: Implement mcrxr
2020-11-07 Kyle Roartyarch-x86: include system syscall header in syscall...
2020-11-06 Gabe Blackarch,cpu: Enforce using accessors to get at src/destRegIdx.
2020-11-06 Kyle Roartyarch-gcn3: Fix operand size reporting for Flat insts
2020-11-04 Gabe Blackarm: Get rid of some unused instruction templates.
2020-11-04 Gabe Blackmips: Fix the build after the MMU changes.
2020-11-03 Giacomo Travagliniarch-arm: Do not use _flushMva for TLBI IPA
2020-11-03 Giacomo Travagliniarch-arm: TlbEntry flush to be considered as functional...
2020-11-03 Giacomo Travagliniarch-arm: Fix implementation of TLBI_VMALL instructions
2020-11-03 Giacomo Travagliniarch-arm: Add el2Enabled cached variable
2020-11-03 Giacomo Travaglinicpu, fastmodel: Remove the old getDTBPtr/getITBPtr...
2020-11-03 Gabe Blackarch: Clean up the __init__s in (Sub)OperandList.
2020-11-03 Yu-hsin Wangdev-arm: Fix VExpressFastmodel timer configs
2020-11-02 Matthew Porembaarch-x86: Make CPUID vendor string a param
2020-11-02 Giacomo Travaglinikvm, arm: Add parameter to force simulation of Gicv2
2020-10-30 Gabe Blackmisc: Delete the now unnecessary create methods.
2020-10-29 Gabe Blackarch: Move many of the generic files outside an NULL...
2020-10-29 Gabe Blackarch,sim: Handle KVM SE page faults with workload events.
2020-10-29 Gabe Blackx86,kvm: Use the new workload event to trigger KVM...
2020-10-29 Gabe Blackmips: Implement an SE workload for Linux.
2020-10-29 Gabe Blackriscv: Implement an SE workload for Linux.
2020-10-28 Gabe Blackx86,scons: De-indent the main x86 SConscript file.
2020-10-28 Gabe Blackx86: Separate system call tables into their own files.
2020-10-28 Gabe Blackarm: Implement an SE workload for Linux and FreeBSD.
2020-10-28 Gabe Blackarch: Re-add copyrights that were accidentally removed.
2020-10-27 Giacomo Travagliniarch-x86: Replace any getDTBPtr/getITBPtr usage
2020-10-27 Giacomo Travagliniarch-sparc: Replace any getDTBPtr/getITBPtr usage
2020-10-27 Giacomo Travagliniarch-riscv: Replace any getDTBPtr/getITBPtr usage
2020-10-27 Gabe Blacksparc: Remove support for Solaris SE mode.
2020-10-27 Gabe Blacksparc: Implement an SE workload for Linux and Solaris.
2020-10-26 Gabe Blackpower: Implement an SE workload for Linux.
2020-10-26 Gabe Blackx86: Delegate process loading to the EmuLinux workload.
2020-10-24 Gabe Blackfastmodel: Fix up for the new standardized create(...
2020-10-23 Giacomo Travagliniarch-arm: Fix implementation of TLBI ALLEx instructions
2020-10-23 Giacomo Travagliniarch-arm: Rewrite the TLB flushing interface
2020-10-23 Giacomo Travagliniarch-arm: Reimplement TLB::flushAll
2020-10-23 Giacomo Travagliniarch-arm: TLBIALL/TLBIASID/TLBIMVA base classes for...
2020-10-23 Gabe Blackmisc: Replace enable_if<>::type with enable_if_t<>.
2020-10-22 Gabe Blackx86: Move syscall handling for Linux into the EmuLinux...
2020-10-22 Gabe Blackx86: Create an SEWorkload for x86 linux.
2020-10-21 Gabe Blackmisc: Fix a few accidental transitive includes.
2020-10-21 Giacomo Travagliniarch: Use getTlb in BaseMMU to reduce boilerplate
2020-10-21 Giacomo Travagliniarch-arm: Replace any getDTBPtr/getITBPtr usage
2020-10-21 Giacomo Travaglinimisc: BaseCPU using ArchMMU instead of ArchDTB/ArchITB
2020-10-20 Jason Lowe-Powercpu-kvm, arch-x86: Fix KVM on Intel platforms
2020-10-19 Gabe Blackmisc: Wrap __attribute__((aligned())) in a macro in...
2020-10-19 Gabe Blackmisc: Use compiler.hh macros when available.
2020-10-17 Giacomo Travagliniarch-arm: Implement ArmPMU DTB generation
2020-10-17 Giacomo Travaglinidev-arm, fastmodel: Rewrite Gic.interruptCells
2020-10-14 Gabe Blackmisc: Standardize the way create() constructs SimObjects.
2020-10-14 Jordi Vaqueroarch-arm: Implement Armv8.2-LPA
2020-10-14 Jordi Vaqueroarch-arm: Implement Armv8.2-LVA
2020-10-14 Gabe Blackfastmodel: Update to c++14, and add some missing consts.
2020-10-13 Gabe Blackfastmodel: Add a wrapper for the CortexR52.
2020-10-13 Gabe Blackarch: Use finditer in the (Sub)OperandList classes.
2020-10-13 Gabe Blackarch: Pull the (Sub)OperandList classes into their...
2020-10-12 Gabe Blackarch: Minor cleanup of imports in isa_parser.py.
2020-10-12 Gabe Blackarch: Split utility methods/variables out of the ISA...
2020-10-12 Gabe Blackarch: Split the operand types out of the ISA parser.
2020-10-12 Gabe Blackarch: Move the ISA parser into a package.
2020-10-09 Gabe Blackarch: Build the operand REs in the isa_parser on demand.
2020-10-08 Giacomo Travagliniarch-arm: Default ArmSystem to AArch64
2020-10-07 Gabe Blacksparc: Simplify the IntOp format slightly.
2020-10-07 Gabe Blacksparc: Clean up some code in base.isa.
2020-10-07 Giacomo Travaglinifastmodel: Add IrisMMU model
2020-10-07 Giacomo Travagliniarch: Add generic BaseMMU
2020-10-06 Hoa Nguyenarch-arm: Replace call to `tmpnam()` by a deterministic one
2020-10-06 Pierre Ayoubarch-arm: Add recursion for DTB entry generation inside...
2020-10-01 Bobby R. Brucemisc: Merge branch 'release-staging-v20.1.0.0' into...
2020-09-30 Giacomo Travagliniarch-x86: Add byteEnable mask in x86 memhelpers
2020-09-30 Giacomo Travagliniarch-arm: Using new "raw" memhelpers
2020-09-30 Giacomo Travagliniarch: Add raw read/writeMem helpers
2020-09-30 Giacomo Travagliniarch: Do value-initialization for MemOperand
2020-09-29 Gabe Blackarch: Wrap a docstring in isa_parser.py.
2020-09-29 Gabe Blackx86: Use the common pseudoInst dispatch function.
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