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CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
[gem5.git]
/
src
/
cpu
/
BaseCPU.py
2012-01-31
Geoffrey Blake
CheckerCPU: Re-factor CheckerCPU to be compatible with...
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2012-01-17
Andreas Hansson
CPU: Moving towards a more general port across CPU...
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2011-12-01
Ali Saidi
ARM: Add support for having a TLB cache.
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2011-03-26
Korey Sewell
mips: cleanup ISA-specific code
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2011-02-07
Joel Hestness
mcpat: Adds McPAT performance counters
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2011-02-04
Gabe Black
Config: Keep track of uncached and cached ports separately.
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2011-02-02
Gabe Black
X86: Add L1 caches for the TLB walkers.
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2010-11-23
Gabe Black
X86: Loosen an assert for x86 and connect the APIC...
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2010-06-02
Ali Saidi
ARM: Implement the ARM TLB/Tablewalker. Needs performan...
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2010-01-19
Derek Hower
merge
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2009-10-27
Timothy M. Jones
POWER: Add support for the Power ISA
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2009-09-22
Nathan Binkert
python: Move more code into m5.util allow SCons to...
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2009-04-21
Nathan Binkert
Automated merge with ssh://m5sim.org//repo/m5
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2009-04-21
Nathan Binkert
arm: Unify the ARM tlb. We forgot about this when...
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2009-04-09
Nathan Binkert
tlb: More fixing of unified TLB
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2009-04-09
Gabe Black
tlb: Don't separate the TLB classes into an instruction...
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2009-04-06
Gabe Black
Merge ARM into the head. ARM will compile but may not...
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2009-01-31
Ali Saidi
Config: Cause a fatal() when a parameter without a...
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2008-12-17
Steve Reinhardt
Make Alpha pseudo-insts available from SE mode.
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2008-11-03
Lisa Hsu
make BaseCPU the provider of _cpuId, and cpuId() instea...
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2008-10-12
Gabe Black
X86: Fix the ordering of special physical address ranges.
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2008-10-12
Gabe Black
X86: Make APICs communicate through the memory system.
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2008-10-12
Gabe Black
X86: Make the local APIC accessible through the memory...
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2008-10-12
Gabe Black
Turn Interrupts objects into SimObjects. Also, move...
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2008-08-11
Nathan Binkert
params: Convert the CPU objects to use the auto generat...
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2008-02-11
Steve Reinhardt
Automated merge with file:/home/stever/hg/m5-orig
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2008-02-06
Stephen Hines
Add base ARM code to M5
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2007-11-21
Gabe Black
imported patch pagewalker.patch
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2007-11-15
Korey Sewell
merge Ali's config change...
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2007-11-15
Korey Sewell
branch merge
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2007-11-13
Korey Sewell
Add in files from merge-bare-iron, get them compiling...
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2007-11-13
Gabe Black
X86: Separate out the page table walker into it's own...
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2007-11-12
Gabe Black
X86: Work on the page table walker, TLB, and related...
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2007-11-12
Gabe Black
X86: Implement a page table walker.
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2007-08-28
Gabe Black
Merge with head.
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2007-08-27
Gabe Black
Address Translation: Make SE mode use an actual TLB...
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2007-08-14
Ali Saidi
Merge IGNORE_STYLE change and my change.
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2007-08-12
Nathan Binkert
merge
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2007-08-08
Vincentius Robby
Added fastmem option.
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2007-07-29
Steve Reinhardt
Merge Gabe's changes from head.
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2007-07-29
Gabe Black
Merge ... head. style.py was also missing an argument...
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2007-07-29
Gabe Black
Merge with head.
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2007-07-29
Gabe Black
Turn the instruction tracing code into pluggable sim...
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2007-06-20
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-05-31
Gabe Black
Merge zizzer.eecs.umich.edu:/bk/newmem
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2007-05-28
Steve Reinhardt
Merge vm1.(none):/home/stever/bk/newmem-head
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2007-05-28
Nathan Binkert
Move SimObject python files alongside the C++ and fix
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