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mips: cleanup ISA-specific code
[gem5.git] / src / cpu / BaseCPU.py
2011-03-26 Korey Sewellmips: cleanup ISA-specific code blob | commitdiff | raw
2011-02-07 Joel Hestnessmcpat: Adds McPAT performance counters blob | commitdiff | raw | diff to current
2011-02-04 Gabe BlackConfig: Keep track of uncached and cached ports separately. blob | commitdiff | raw | diff to current
2011-02-02 Gabe BlackX86: Add L1 caches for the TLB walkers. blob | commitdiff | raw | diff to current
2010-11-23 Gabe BlackX86: Loosen an assert for x86 and connect the APIC... blob | commitdiff | raw | diff to current
2010-06-02 Ali SaidiARM: Implement the ARM TLB/Tablewalker. Needs performan... blob | commitdiff | raw | diff to current
2010-01-19 Derek Howermerge blob | commitdiff | raw | diff to current
2009-10-27 Timothy M. JonesPOWER: Add support for the Power ISA blob | commitdiff | raw | diff to current
2009-09-22 Nathan Binkertpython: Move more code into m5.util allow SCons to... blob | commitdiff | raw | diff to current
2009-04-21 Nathan BinkertAutomated merge with ssh://m5sim.org//repo/m5 blob | commitdiff | raw | diff to current
2009-04-21 Nathan Binkertarm: Unify the ARM tlb. We forgot about this when... blob | commitdiff | raw | diff to current
2009-04-09 Nathan Binkerttlb: More fixing of unified TLB blob | commitdiff | raw | diff to current
2009-04-09 Gabe Blacktlb: Don't separate the TLB classes into an instruction... blob | commitdiff | raw | diff to current
2009-04-06 Gabe BlackMerge ARM into the head. ARM will compile but may not... blob | commitdiff | raw | diff to current
2009-01-31 Ali SaidiConfig: Cause a fatal() when a parameter without a... blob | commitdiff | raw | diff to current
2008-12-17 Steve ReinhardtMake Alpha pseudo-insts available from SE mode. blob | commitdiff | raw | diff to current
2008-11-03 Lisa Hsumake BaseCPU the provider of _cpuId, and cpuId() instea... blob | commitdiff | raw | diff to current
2008-10-12 Gabe BlackX86: Fix the ordering of special physical address ranges. blob | commitdiff | raw | diff to current
2008-10-12 Gabe BlackX86: Make APICs communicate through the memory system. blob | commitdiff | raw | diff to current
2008-10-12 Gabe BlackX86: Make the local APIC accessible through the memory... blob | commitdiff | raw | diff to current
2008-10-12 Gabe BlackTurn Interrupts objects into SimObjects. Also, move... blob | commitdiff | raw | diff to current
2008-08-11 Nathan Binkertparams: Convert the CPU objects to use the auto generat... blob | commitdiff | raw | diff to current
2008-02-11 Steve ReinhardtAutomated merge with file:/home/stever/hg/m5-orig blob | commitdiff | raw | diff to current
2008-02-06 Stephen HinesAdd base ARM code to M5 blob | commitdiff | raw | diff to current
2007-11-21 Gabe Blackimported patch pagewalker.patch blob | commitdiff | raw | diff to current
2007-11-15 Korey Sewellmerge Ali's config change... blob | commitdiff | raw | diff to current
2007-11-15 Korey Sewellbranch merge blob | commitdiff | raw | diff to current
2007-11-13 Korey SewellAdd in files from merge-bare-iron, get them compiling... blob | commitdiff | raw | diff to current
2007-11-13 Gabe BlackX86: Separate out the page table walker into it's own... blob | commitdiff | raw | diff to current
2007-11-12 Gabe BlackX86: Work on the page table walker, TLB, and related... blob | commitdiff | raw | diff to current
2007-11-12 Gabe BlackX86: Implement a page table walker. blob | commitdiff | raw | diff to current
2007-08-28 Gabe BlackMerge with head. blob | commitdiff | raw | diff to current
2007-08-27 Gabe BlackAddress Translation: Make SE mode use an actual TLB... blob | commitdiff | raw | diff to current
2007-08-14 Ali SaidiMerge IGNORE_STYLE change and my change. blob | commitdiff | raw | diff to current
2007-08-12 Nathan Binkertmerge blob | commitdiff | raw | diff to current
2007-08-08 Vincentius RobbyAdded fastmem option. blob | commitdiff | raw | diff to current
2007-07-29 Steve ReinhardtMerge Gabe's changes from head. blob | commitdiff | raw | diff to current
2007-07-29 Gabe BlackMerge ... head. style.py was also missing an argument... blob | commitdiff | raw | diff to current
2007-07-29 Gabe BlackMerge with head. blob | commitdiff | raw | diff to current
2007-07-29 Gabe BlackTurn the instruction tracing code into pluggable sim... blob | commitdiff | raw | diff to current
2007-06-20 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem blob | commitdiff | raw | diff to current
2007-05-31 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem blob | commitdiff | raw | diff to current
2007-05-28 Steve ReinhardtMerge vm1.(none):/home/stever/bk/newmem-head blob | commitdiff | raw | diff to current
2007-05-28 Nathan BinkertMove SimObject python files alongside the C++ and fix blob | commitdiff | raw | diff to current