arch-arm,cpu: Introduce a getEMI virtual method on StaticInst.
[gem5.git] / src / cpu / FuncUnit.py
2020-02-26 Bobby R. Brucemisc: merge branch 'release-staging-v19.0.0.0' into...
2020-02-24 Bobby R. Brucemisc: Merged release-staging-v19.0.0.0 into develop
2020-02-17 Gabe Blackcpu: Delete authors lists from the cpu directory.
2019-03-14 Giacomo Gabrielliarch-arm,cpu: Add initial support for Arm SVE
2018-10-09 Matt Horsnellarch-arm: AArch32 Crypto AES
2018-10-09 Matt Horsnellarch-arm: AArch32 Crypto SHA
2016-10-15 Fernando Endocpu, arm: Distinguish Float* and SimdFloat*, create...
2015-04-30 Nilay Vaishcpu: o3: replace issueLatency with bool pipelined
2012-11-02 Andreas Sandbergsim: Include object header files in SWIG interfaces
2012-09-07 Andreas HanssonParam: Transition to Cycles for relevant parameters
2010-11-15 Giacomo GabrielliCPU/ARM: Add SIMD op classes to CPU models and ARM...
2007-06-20 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-06-18 Steve ReinhardtMerge vm1.(none):/home/stever/bk/newmem-head
2007-06-12 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-06-12 Nathan BinkertRename enum from OpType to OpClass so it's consistent...
2007-05-31 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-05-28 Steve ReinhardtMerge vm1.(none):/home/stever/bk/newmem-head
2007-05-28 Nathan BinkertMove SimObject python files alongside the C++ and fix