X86: Make the timing simple CPU handle variable length instructions.
[gem5.git] / src / cpu / base.hh
2008-11-04 Lisa Hsuget rid of all instances of readTid() and getThreadNum...
2008-11-03 Lisa Hsumake BaseCPU the provider of _cpuId, and cpuId() instea...
2008-10-21 Nathan Binkertstyle: Use the correct m5 style for things relating...
2008-10-12 Gabe BlackCPU: Create a microcode ROM object in the CPU which...
2008-10-12 Gabe BlackTurn Interrupts objects into SimObjects. Also, move...
2008-10-12 Gabe BlackCPU: Eliminate the get_vec function.
2008-10-11 Gabe BlackCPU: Add a getInterruptController function
2008-10-09 Nathan Binkerteventq: convert all usage of events to use the new...
2008-08-18 Richard StrongChanged BaseCPU::ProfileEvent's interval member to...
2008-08-11 Nathan Binkertparams: Convert the CPU objects to use the auto generat...
2008-02-11 Steve ReinhardtAutomated merge with file:/home/stever/hg/m5-orig
2008-02-06 Stephen HinesMake the Event::description() a const function
2007-11-15 Korey Sewellmerge Ali's config change...
2007-11-15 Korey Sewelladd core specific parameter to BaseCPU params
2007-11-15 Korey Sewellbranch merge
2007-11-13 Korey SewellAdd in files from merge-bare-iron, get them compiling...
2007-10-31 Steve ReinhardtMerge in bus DPRINTF changes.
2007-10-03 Gabe BlackMerge with head.
2007-09-28 Ali SaidiRename cycles() function to ticks()
2007-09-28 Ali SaidiUpdate statistics to use cycles properly instead of...
2007-07-29 Steve ReinhardtMerge Gabe's changes from head.
2007-07-29 Gabe BlackMerge ... head. style.py was also missing an argument...
2007-07-29 Gabe BlackMerge with head.
2007-07-29 Gabe BlackTurn the instruction tracing code into pluggable sim...
2007-04-03 Ali SaidiMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2007-03-27 Ron DreslinskiMerge zizzer:/bk/newmem
2007-03-23 Kevin LimMerge ktlim@zizzer:/bk/newmem
2007-03-16 Ali SaidiMerge zizzer:/bk/newmem
2007-03-15 Ali SaidiMerge zizzer:/bk/newmem
2007-03-15 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-15 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-15 Gabe BlackMake the predecoder an object with it's own switched...
2007-03-09 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-09 Ali SaidiMerge zizzer:/bk/newmem
2007-03-09 Kevin LimTwo fixes:
2007-03-06 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-05 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-04 Ali SaidiMerge zizzer:/bk/newmem
2007-03-03 Ali SaidiImplement Niagara I/O interface and rework interrupts
2007-02-01 Lisa HsuMerge zizzer:/bk/newmem
2007-01-30 Ali SaidiMerge zizzer:/bk/newmem
2007-01-30 Ali SaidiMake SPARC checkpointing work
2007-01-27 Gabe BlackMerge zizzer:/bk/newmem
2007-01-26 Ali SaidiMerge zizzer:/bk/newmem
2007-01-26 Ali SaidiMerge zizzer:/bk/newmem
2007-01-26 Ali SaidiMerge zeep.pool:/z/saidi/work/m5.newmem
2007-01-26 Lisa HsuMerge zizzer:/bk/newmem
2007-01-26 Lisa Hsueliminate cpu checkInterrupts bool, it is redundant...
2007-01-23 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-01-22 Ali SaidiMerge zizzer:/bk/newmem
2007-01-20 Lisa HsuMerge zed.eecs.umich.edu:/.automount/zeep/z/saidi/work...
2007-01-11 Lisa HsuMerge zed.eecs.umich.edu:/z/hsul/work/sparc/ali.m5
2007-01-08 Lisa Hsuthe way i understand it, interrupts in m5 is a little...
2006-12-16 Gabe BlackMerge zizzer:/bk/newmem
2006-12-15 Lisa HsuMerge zizzer:/bk/newmem
2006-12-15 Lisa HsuMerge zizzer:/bk/sparcfs
2006-12-13 Lisa HsuMerge zizzer:/bk/newmem
2006-12-13 Lisa HsuMerge zizzer:/bk/newmem
2006-12-13 Lisa HsuMerge zizzer:/bk/newmem
2006-12-05 Gabe BlackMerge zizzer:/bk/sparcfs
2006-12-04 Lisa HsuMerge zizzer:/bk/sparcfs
2006-12-04 Ali SaidiMore changes to get SPARC fs closer. Now at 1.2M cycles...
2006-11-23 Ali SaidiMerge zizzer:/bk/sparcfs
2006-11-16 Gabe BlackMerge zower.eecs.umich.edu:/home/gblack/m5/newmemmemops
2006-11-16 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem/
2006-11-14 Ron DreslinskiMerge zizzer:/bk/newmem
2006-11-14 Ron DreslinskiMerge zizzer:/bk/newmem
2006-11-14 Ron DreslinskiMake cpu's capable of having a phase shift
2006-11-13 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem/
2006-11-13 Kevin LimMerge ktlim@zamp:./local/clean/tmp/test-regress
2006-11-12 Ron DreslinskiMerge zizzer:/bk/newmem
2006-11-12 Nathan BinkertGet rid of the ParamContext for pseudo instructions...
2006-11-10 Kevin LimMerge ktlim@zizzer:/bk/newmem
2006-11-09 Kevin LimMerge ktlim@zizzer:/bk/newmem
2006-11-08 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem/
2006-11-08 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem/
2006-11-08 Gabe BlackMerge zeep.eecs.umich.edu:/home/gblack/m5/newmem
2006-11-07 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem/
2006-11-06 Ali SaidiMerge zizzer:/bk/newmem
2006-11-06 Kevin LimMerge ktlim@zizzer:/bk/newmem
2006-11-06 Kevin LimClean up clock phase drift code a bit.
2006-11-03 Gabe BlackGot rid of "inPalMode". Some places are still effective...
2006-11-03 Gabe BlackAdd a new file which describes an ISA's interrupt handl...
2006-10-12 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-10-10 Kevin LimMerge ktlim@zizzer:/bk/newmem
2006-10-08 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-10-08 Ron DreslinskiMerge zizzer:/z/m5/Bitkeeper/newmem
2006-10-08 Steve ReinhardtImplement Alpha LL/SC support for SimpleCPU (Atomic...
2006-10-07 Ali SaidiMerge zizzer:/bk/newmem
2006-10-02 Kevin LimMerge ktlim@zizzer:/bk/newmem
2006-10-02 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-10-02 Kevin LimMerge ktlim@zizzer:/bk/newmem
2006-10-02 Kevin LimUpdates to fix merge issues and bring almost everything...
2006-10-01 Kevin LimMerge ktlim@zamp:./local/clean/o3-merge/m5
2006-07-19 Ali SaidiMerge zizzer:/bk/newmem
2006-07-18 Gabe BlackMerge m5.eecs.umich.edu:/bk/newmem
2006-07-11 Kevin LimMerge ktlim@zizzer:/bk/newmem
2006-07-07 Kevin LimMerge ktlim@zizzer:/bk/newmem
2006-07-07 Korey SewellMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2006-07-07 Ron DreslinskiUpdate cpus to use the getPort function to use a connec...
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