cpu: Flush TLBs on switchOut()
[gem5.git] / src / cpu / base.hh
2013-01-07 Andreas Sandbergcpu: Flush TLBs on switchOut()
2013-01-07 Andreas Sandbergcpu: Introduce sanity checks when switching between...
2012-11-02 Dam SunwooARM: dump stats and process info on context switches
2012-10-15 Andreas HanssonPort: Add protocol-agnostic ports in the port hierarchy
2012-09-25 Andreas Sandbergsim: Move CPU-specific methods from SimObject to the...
2012-08-28 Andreas HanssonClock: Add a Cycles wrapper class and use where applicable
2012-08-21 Andreas HanssonClock: Move the clock and related functions to ClockedO...
2012-05-26 Gabe BlackCPU: Merge the predecoder and decoder.
2012-05-01 Andreas HanssonMEM: Separate requests and responses for timing accesses
2012-04-14 Andreas HanssonMEM: Separate snoops and normal memory requests/responses
2012-04-03 Andreas HanssonAtomic: Remove the physmem_port and access memory directly
2012-03-30 William WangMEM: Introduce the master/slave port sub-classes in C++
2012-03-19 Andreas Hanssonclang: Fix recently introduced clang compilation errors
2012-03-02 Andreas HanssonCPU: Check that the interrupt controller is created...
2012-02-24 Andreas HanssonCPU: Round-two unifying instr/data CPU ports across...
2012-02-12 Anthony Gutierrezcpu: add separate stats for insts/ops both globally...
2012-02-12 Ali Saidimem: Add a master ID to each request object.
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Koan-Sin Tanclang: Enable compiling gem5 using clang 2.9 and 3.0
2012-01-31 Gabe BlackMerge with main repository.
2012-01-29 Gabe BlackYet another merge with the main repository.
2012-01-28 Gabe BlackMerge with the main repo.
2012-01-16 Gabe BlackMerge yet again with the main repository.
2012-01-17 Andreas HanssonMEM: Separate queries for snooping and address ranges
2012-01-17 Andreas HanssonCPU: Moving towards a more general port across CPU...
2012-01-10 Ali SaidiO3: Add support of function tracing with O3 CPU.
2012-01-07 Gabe BlackAnother merge with the main repository.
2012-01-07 Gabe BlackMerge with the main repository again.
2012-01-07 Gabe BlackMerge with main repository.
2011-11-18 Gabe BlackSE/FS: Get rid of includes of config/full_system.hh.
2011-11-18 Gabe BlackSE/FS: Get rid of FULL_SYSTEM in the CPU directory.
2011-11-01 Gabe BlackSE/FS: Expose the same methods on the CPUs in SE and...
2011-10-09 Gabe BlackSE/FS: Build the Interrupt objects in SE mode.
2011-04-15 Nathan Binkertincludes: sort all includes
2011-03-26 Korey Sewellmips: cleanup ISA-specific code
2011-02-07 Brad Beckmannm5: added work completed monitoring support
2011-02-07 Joel Hestnessmcpat: Adds McPAT performance counters
2011-01-08 Steve ReinhardtReplace curTick global variable with accessor functions.
2010-11-16 Gabe BlackO3: Make O3 support variably lengthed instructions.
2010-04-15 Nathan Binkerttick: rename Clock namespace to SimClock
2010-01-22 Derek HowerAutomated merge with ssh://hg@m5sim.org/m5
2010-01-19 Derek Howermerge
2010-01-18 Lisa HsuAutomated merge with ssh://hsul@localhost:4444//repo/m5
2010-01-12 Lisa Hsusince totalInstructions() is impl'ed by all the cpus...
2009-09-23 Nathan Binkertarch: nuke arch/isa_specific.hh and move stuff to gener...
2009-05-26 Nathan Binkerttypes: add a type for thread IDs and try to use it...
2009-05-05 Korey Sewellcpus: fix cpu progress event
2009-05-05 Korey Sewellmerge code
2009-05-05 Korey Sewellcpus: fix cpu progress event
2009-04-06 Gabe BlackMerge ARM into the head. ARM will compile but may not...
2009-03-06 Nathan Binkertstats: Fix all stats usages to deal with template fixes
2009-01-24 Nathan Binkertcpu: provide a wakeup mechanism that can be used to...
2008-11-04 Lisa Hsuget rid of all instances of readTid() and getThreadNum...
2008-11-03 Lisa Hsumake BaseCPU the provider of _cpuId, and cpuId() instea...
2008-10-21 Nathan Binkertstyle: Use the correct m5 style for things relating...
2008-10-12 Gabe BlackCPU: Create a microcode ROM object in the CPU which...
2008-10-12 Gabe BlackTurn Interrupts objects into SimObjects. Also, move...
2008-10-12 Gabe BlackCPU: Eliminate the get_vec function.
2008-10-11 Gabe BlackCPU: Add a getInterruptController function
2008-10-09 Nathan Binkerteventq: convert all usage of events to use the new...
2008-08-18 Richard StrongChanged BaseCPU::ProfileEvent's interval member to...
2008-08-11 Nathan Binkertparams: Convert the CPU objects to use the auto generat...
2008-02-11 Steve ReinhardtAutomated merge with file:/home/stever/hg/m5-orig
2008-02-06 Stephen HinesMake the Event::description() a const function
2007-11-15 Korey Sewellmerge Ali's config change...
2007-11-15 Korey Sewelladd core specific parameter to BaseCPU params
2007-11-15 Korey Sewellbranch merge
2007-11-13 Korey SewellAdd in files from merge-bare-iron, get them compiling...
2007-10-31 Steve ReinhardtMerge in bus DPRINTF changes.
2007-10-03 Gabe BlackMerge with head.
2007-09-28 Ali SaidiRename cycles() function to ticks()
2007-09-28 Ali SaidiUpdate statistics to use cycles properly instead of...
2007-07-29 Steve ReinhardtMerge Gabe's changes from head.
2007-07-29 Gabe BlackMerge ... head. style.py was also missing an argument...
2007-07-29 Gabe BlackMerge with head.
2007-07-29 Gabe BlackTurn the instruction tracing code into pluggable sim...
2007-04-03 Ali SaidiMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2007-03-27 Ron DreslinskiMerge zizzer:/bk/newmem
2007-03-23 Kevin LimMerge ktlim@zizzer:/bk/newmem
2007-03-16 Ali SaidiMerge zizzer:/bk/newmem
2007-03-15 Ali SaidiMerge zizzer:/bk/newmem
2007-03-15 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-15 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-15 Gabe BlackMake the predecoder an object with it's own switched...
2007-03-09 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-09 Ali SaidiMerge zizzer:/bk/newmem
2007-03-09 Kevin LimTwo fixes:
2007-03-06 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-05 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-04 Ali SaidiMerge zizzer:/bk/newmem
2007-03-03 Ali SaidiImplement Niagara I/O interface and rework interrupts
2007-02-01 Lisa HsuMerge zizzer:/bk/newmem
2007-01-30 Ali SaidiMerge zizzer:/bk/newmem
2007-01-30 Ali SaidiMake SPARC checkpointing work
2007-01-27 Gabe BlackMerge zizzer:/bk/newmem
2007-01-26 Ali SaidiMerge zizzer:/bk/newmem
2007-01-26 Ali SaidiMerge zizzer:/bk/newmem
2007-01-26 Ali SaidiMerge zeep.pool:/z/saidi/work/m5.newmem
2007-01-26 Lisa HsuMerge zizzer:/bk/newmem
2007-01-26 Lisa Hsueliminate cpu checkInterrupts bool, it is redundant...
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