cpu: o3: replace issueLatency with bool pipelined
[gem5.git] / src / cpu / minor /
2015-04-13 Dibakar Gopecpu: re-organizes the branch predictor structure.
2015-04-03 Nikos Nikoleriscpu: fix system total instructions accounting
2015-02-11 Steve Reinhardtmem: restructure Packet cmd initialization a bit more
2015-03-02 Andreas Hanssonmem: Split port retry for all different packet classes
2015-02-16 Andreas Hanssonarch: Make readMiscRegNoEffect const throughout
2015-01-25 Ali Saidisim: Clean up InstRecord
2015-01-20 Andreas Hanssoncpu: Fix retry bug in MinorCPU LSQ
2015-01-03 Andrew Lukefahrminor: fixed LSQ MasterPortID
2014-12-02 Andrew Bardsleycpu: Fix retries on barrier/store in Minor's store...
2014-12-02 Andrew Bardsleycpu: Fix memoryIssueLimit checking in Minor
2014-12-02 Andreas Hanssonmem: Assume all dynamic packet data is array allocated
2014-12-02 Andreas Hanssonmem: Add const getters for write packet data
2014-11-14 Andreas Hanssonarm: Fixes based on UBSan and static analysis
2014-11-06 Marc Orrx86 isa: This patch attempts an implementation at mwait.
2014-11-06 Andrew Lukefahrcpu: Minor Draining Bug
2014-10-30 Ali Saidiautomated merge
2014-10-30 Andrew Bardsleycpu: Fix barrier push to store buffer when full bug...
2014-10-16 Andreas Sandbergcpu: Probe points for basic PMU stats
2014-09-27 Andreas Hanssonarch: Use const StaticInstPtr references where possible
2014-09-20 Mitch Hayengaalpha,arm,mips,power,x86,cpu,sim: Cleanup activate...
2014-09-19 Andreas Hanssonarch: Pass faults by const reference where possible
2014-09-12 Andrew Bardsleycpu: Fix memory access in Minor not setting parent...
2014-09-12 Andreas Hanssonminor: Fix typo in DPRINTF for Minor branch prediction
2014-09-03 Andreas Sandbergarch, cpu: Factor out the ExecContext into a proper...
2014-07-23 Andrew Bardsleycpu: `Minor' in-order CPU model