BaseDynInst: Make the TLB translation timing instead of atomic.
[gem5.git] / src / cpu / o3 /
2010-01-19 Derek Howermerge
2009-11-04 Steve Reinhardto3: get rid of unused physmem pointer
2009-09-26 Steve ReinhardtO3: Add flag to control whether faulting instructions...
2009-09-26 Steve ReinhardtO3: Mark fetch stage as active if it faults.
2009-09-23 Nathan Binkertarch: nuke arch/isa_specific.hh and move stuff to gener...
2009-09-22 Nathan Binkertpython: Move more code into m5.util allow SCons to...
2009-08-03 Derek HowerAutomated merge with ssh://hg@m5sim.org/m5
2009-08-02 Steve ReinhardtFix setting of INST_FETCH flag for O3 CPU.
2009-07-25 Korey Sewello3-smt: enforce numThreads parameter for SMT SE mode
2009-07-13 Derek Howermerge
2009-07-09 Gabe BlackGet rid of the unused get(Data|Inst)Asid and (inst...
2009-07-09 Gabe BlackRegisters: Add a registers.hh file as an ISA switched...
2009-07-09 Gabe BlackRegisters: Get rid of the float register width parameter.
2009-07-09 Gabe BlackRegisters: Add an ISA object which replaces the MiscReg...
2009-06-05 Nathan Binkertmove: put predictor includes and cc files into the...
2009-05-26 Nathan Binkerttypes: add a type for thread IDs and try to use it...
2009-05-17 Nathan Binkertincludes: sort includes again
2009-05-17 Nathan Binkerttypes: Move stuff for global types into src/base/types.hh
2009-05-12 Korey Sewellinorder-o3: allow both to compile together
2009-05-12 Korey Sewellinorder-bpred: edits to handle non-delay-slot ISAs
2009-04-20 Gabe BlackMem: Change isLlsc to isLLSC.
2009-04-19 Gabe BlackMemory: Rename LOCKED for load locked store conditional...
2009-04-18 Korey Sewello3-delay-slot-bpred: fix decode stage handling of uncdt...
2009-04-17 Steve Reinhardto3, inorder: fix FS bug due to initializing ThreadState...
2009-04-16 Steve Reinhardto3: handle fetch with no active threads correctly.
2009-04-16 Steve Reinhardto3: fix {read,set}ArchFloatReg* functions.
2009-04-15 Steve ReinhardtThreadState: initialize status to Halted in constructor.
2009-04-15 Steve ReinhardtGet rid of the Unallocated thread context state.
2009-04-09 Nathan Binkerttlb: More fixing of unified TLB
2009-04-09 Gabe Blacktlb: Don't separate the TLB classes into an instruction...
2009-04-06 Gabe BlackMerge ARM into the head. ARM will compile but may not...
2009-03-07 Nathan Binkertstats: fix duplicate statistics names.
2009-03-06 Nathan Binkertstats: Fix all stats usages to deal with template fixes
2009-03-04 Steve ReinhardtO3: Make numThreads error message more helpful.
2009-02-27 Gabe BlackProcesses: Make getting and setting system call argumen...
2009-02-27 Ali SaidiCPA: Add code to automatically record function symbols...
2009-02-25 Gabe BlackISA: Replace the translate functions in the TLBs with...
2009-02-25 Gabe BlackCPU: Get rid of translate... functions from various...
2009-02-10 Korey SewellCPU: Prepare CPU models for the new in-order CPU model.
2009-01-24 Nathan Binkertcpu: provide a wakeup mechanism that can be used to...
2009-01-21 Nathan Binkerto3cpu: give a name to the activity recorder for better...
2009-01-20 Nathan Binkertthread_context: move getSystemPtr so SE mode can get...
2008-12-06 Nathan Binkerteventq: use the flags data structure
2008-11-10 Clint SmullenO3CPU: Make the instcount debugging stuff per-cpu.
2008-11-04 Lisa Hsuget rid of all instances of readTid() and getThreadNum...
2008-11-03 Lisa HsuAdd in Context IDs to the simulator. From now on,...
2008-11-03 Lisa Hsumake BaseCPU the provider of _cpuId, and cpuId() instea...
2008-10-23 Lisa Hsus/cpu_id/cpuId in o3 (to be consistent and match style...
2008-10-21 Nathan Binkertstyle: Use the correct m5 style for things relating...
2008-10-20 Ali SaidiO3CPU: Undo Gabe's changes to remove hwrei and simpalch...
2008-10-13 Gabe BlackGet rid of old RegContext code.
2008-10-12 Gabe BlackTurn Interrupts objects into SimObjects. Also, move...
2008-10-11 Gabe BlackCPU: Eliminate the simPalCheck funciton.
2008-10-11 Gabe BlackCPU: Eliminate the hwrei function.
2008-10-09 Nathan Binkerteventq: convert all usage of events to use the new...
2008-10-09 Gabe BlackO3: Generaize the O3 IMPL class so it isn't split out...
2008-10-09 Gabe BlackO3: Generaize the O3 dynamic instruction class so it...
2008-10-09 Gabe BlackO3: Generalize the O3 CPU object so it isn't split...
2008-09-28 Nathan Binkertgcc: Add extra parens to quell warnings.
2008-09-26 Kevin LimO3CPU: Fix thread writeback logic.
2008-09-26 Kevin LimO3CPU: Add a hack to ensure that nextPC is set correctl...
2008-09-22 Nathan Binkertgcc: Version 4.3 is pretty anal about shadowing types...
2008-09-10 Ali Saidistyle: Remove non-leading tabs everywhere they shouldn...
2008-08-18 Richard StrongChanged BaseCPU::ProfileEvent's interval member to...
2008-08-11 Nathan Binkertparams: Convert the CPU objects to use the auto generat...
2008-07-01 Ali SaidiRemove delVirtPort() and make getVirtPort() only return...
2008-07-01 Ali SaidiMake the cached virtPort have a thread context so it...
2008-06-28 Steve ReinhardtAutomated merge after backout.
2008-06-28 Steve ReinhardtBacked out changeset 94a7bb476fca: caused memory leak.
2008-06-24 Ali SaidiAutomated merge with repo.m5sim.org/m5-stable
2008-06-21 Steve ReinhardtGenerate more useful error messages for unconnected...
2008-03-24 Steve ReinhardtDon't FastAlloc MSHRs since we don't allocate them...
2008-02-27 Steve ReinhardtAutomated merge with ssh://daystrom.m5sim.org//repo/m5
2008-02-27 Korey SewellAdd comments in code to describe bug conditions.
2008-02-27 Korey SewellFix Load/Store Queue squashing after a SMT thread is...
2008-02-27 Korey SewellFix offset in removeThread() function so that float...
2008-02-27 Gabe BlackTLB: Make a TLB base class and put a virtual demapPage...
2008-02-11 Steve ReinhardtAutomated merge with file:/home/stever/hg/m5-orig
2008-02-06 Stephen HinesMake the Event::description() a const function
2008-02-06 Stephen HinesAdd base ARM code to M5
2008-01-14 Ke MengThe reason is that the event is supposed to put the...
2008-01-02 Steve ReinhardtAdd functional PrintReq command for memory-system debug...
2007-11-16 Korey Sewelladd thread id to misc. reg functions
2007-11-16 Korey Sewelladd microPC stuff back in. got deleted on changeset...
2007-11-15 Korey Sewellput the flattenIndex stuff back in O3 AND put fatal...
2007-11-15 Korey Sewellmerge Ali's config change...
2007-11-15 Korey SewellGet MIPS simple regression working. Take out unecessary...
2007-11-15 Korey Sewellbranch merge
2007-11-13 Korey SewellAdd in files from merge-bare-iron, get them compiling...
2007-11-12 Gabe BlackX86: Implement a page table walker.
2007-11-12 Gabe BlackX86: Make the micropc available through the thread...
2007-11-06 Gabe BlackO3: Remove unneeded variable.
2007-10-31 Steve ReinhardtMerge in bus DPRINTF changes.
2007-10-31 Ali SaidiTraceflags: Add SCons function to created a traceflag...
2007-10-03 Gabe BlackMerge with head.
2007-10-03 Gabe BlackCPU: Make the cpuid parameter get set in SE mode as...
2007-10-03 Gabe BlackCPU: Make the cpus check the pc event queues in SE...
2007-10-03 Gabe BlackCPU: Make sure the system parameter gets set in the...
2007-09-28 Ali SaidiRename cycles() function to ticks()
2007-09-28 Ali SaidiUpdate statistics to use cycles properly instead of...
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