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cpu: Fix rename mis-handling serializing instructions when resource constrained
[gem5.git] / src / cpu / pred /
2013-01-24 Nilay Vaish ext... branch predictor: move out of o3 and inorder cpus tree | commitdiff
2012-12-06 Erik TomuskTournamentBP: Fix some bugs with table sizes and counters tree | commitdiff
2012-11-02 Mrinmoy Ghosho3: Fix a couple of issues with the local predictor. tree | commitdiff
2012-02-13 Mrinmoy GhoshBPred: Fix RAS to handle predicated call/return instruc... tree | commitdiff
2012-02-13 Mrinmoy GhoshBP: Fix several Branch Predictor issues. tree | commitdiff
2011-08-07 Ali SaidiO3: Fix uninitialized variable in the tournament branch... tree | commitdiff
2011-07-10 Mrinmoy GhoshBranch predictor: Fixes the tournament branch predictor. tree | commitdiff
2011-06-03 Nathan Binkertscons: rename TraceFlags to DebugFlags tree | commitdiff
2011-04-15 Nathan Binkerttrace: reimplement the DTRACE function so it doesn... tree | commitdiff
2010-10-31 Gabe BlackISA,CPU,etc: Create an ISA defined PC type that abstrac... tree | commitdiff
2010-05-14 Ali SaidiAutomated merge with ssh://m5sim.org//repo/m5 tree | commitdiff
2010-05-14 Maximilien BreugheBPRED: Fixed the treshold-bug in the tournament predictor. tree | commitdiff
2009-06-05 Nathan Binkerttypes: clean up types, especially signed vs unsigned tree | commitdiff
2009-06-05 Nathan Binkertmove: put predictor includes and cc files into the... tree | commitdiff