| 2020-02-17 |
Gabe Black | cpu: Delete authors lists from the cpu directory. |
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| 2020-02-17 |
Giacomo Travaglini | cpu: Mark ExecContext::tcBase() as const |
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| 2019-12-11 |
Giacomo Travaglini | cpu: Fix coding style (byteEnable->byte_enable) |
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| 2019-12-11 |
Giacomo Travaglini | cpu: Add byteEnable assertions to readMem and initateMe... |
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| 2019-12-10 |
Gabe Black | arch,cpu,sim: Push syscall number determination up... |
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| 2019-12-03 |
Brandon Potter | cpu,sim-se: move error checks in syscall methods |
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| 2019-09-23 |
Jordi Vaquero | cpu, mem: Changing AtomicOpFunctor* for unique_ptr... |
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| 2019-05-11 |
Giacomo Gabrielli | cpu,mem: Add support for partial loads/stores and wide... |
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| 2019-05-11 |
Giacomo Gabrielli | cpu: Add a memory access predicate |
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| 2019-04-30 |
Gabe Black | cpu: alpha: Delete all occurrances of the simPalCheck... |
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| 2019-04-30 |
Gabe Black | cpu: Remove hwrei from the generic interfaces. |
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| 2019-04-29 |
Gabe Black | cpu: Get rid of the (read|set)RegOtherThread methods. |
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| 2019-02-08 |
Tuan Ta | cpu: support atomic memory request type with AtomicOpFu... |
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| 2019-02-01 |
Gabe Black | cpu, arch: Replace the CCReg type with RegVal. |
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| 2019-01-31 |
Gabe Black | arch: cpu: Rename *FloatRegBits* to *FloatReg*. |
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| 2019-01-30 |
Giacomo Gabrielli | arch,cpu: Add vector predicate registers |
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| 2019-01-25 |
Giacomo Travaglini | cpu: Fix VecElemClass bugs in cpu models |
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| 2019-01-22 |
Gabe Black | arch: cpu: Stop passing around misc registers by reference. |
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| 2019-01-16 |
Gabe Black | cpu: dev: sim: gpu-compute: Banish some ISA specific... |
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| 2018-12-20 |
Gabe Black | arch, cpu: Remove float type accessors. |
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| 2018-11-16 |
Rekai Gonzalez-Alb... | cpu: Fix the usage of const DynInstPtr |
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| 2018-01-09 |
Gabe Black | cpu, power: Get rid of the remnants of the EA computati... |
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| 2017-07-05 |
Rekai Gonzalez-Alb... | arch: ISA parser additions of vector registers |
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| 2017-07-05 |
Rekai Gonzalez-Alb... | cpu: Added interface for vector reg file |
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| 2017-07-05 |
Rekai Gonzalez-Alb... | cpu: Simplify the rename interface and use RegId |
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| 2017-07-05 |
Nathanael Premillieu | arch, cpu: Architectural Register structural indexing |
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| 2015-07-20 |
Brandon Potter | syscall_emul: [patch 13/22] add system call retry capab... |
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| 2016-08-15 |
Nikos Nikoleris | cpu, arch: fix the type used for the request flags |
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| 2016-01-18 |
Steve Reinhardt | cpu. arch: add initiateMemRead() to ExecContext interface |
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| 2015-10-12 |
Andreas Hansson | misc: Remove redundant compiler-specific defines |
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| 2015-09-30 |
Mitch Hayenga | cpu: Add per-thread monitors |
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| 2015-09-30 |
Mitch Hayenga | config,cpu: Add SMT support to Atomic and Timing CPUs |
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projects / gem5.git / history