| 2016-04-06 |
Andreas Sandberg | Revert power patch sets with unexpected interactions |
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| 2016-04-05 |
Mitch Hayenga | mem: Remove threadId from memory request class |
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| 2014-12-09 |
Akash Bagdia | power: Low-power idle power state for idle CPUs |
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| 2015-07-19 |
Krishnendra Nathella | cpu: Fix LLSC atomic CPU wakeup |
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| 2016-02-07 |
Steve Reinhardt | style: fix missing spaces in control statements |
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| 2016-02-07 |
Steve Reinhardt | style: remove trailing whitespace |
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| 2016-01-18 |
Steve Reinhardt | cpu. arch: add initiateMemRead() to ExecContext interface |
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| 2015-09-30 |
Mitch Hayenga | cpu,isa,mem: Add per-thread wakeup logic |
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| 2015-09-30 |
Mitch Hayenga | cpu: Add per-thread monitors |
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| 2015-09-30 |
Mitch Hayenga | config,cpu: Add SMT support to Atomic and Timing CPUs |
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| 2015-07-07 |
Andreas Sandberg | sim: Refactor and simplify the drain API |
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| 2015-04-03 |
Nikos Nikoleris | cpu: fix system total instructions accounting |
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| 2015-03-02 |
Andreas Hansson | mem: Split port retry for all different packet classes |
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| 2015-02-03 |
Andreas Hansson | cpu: Ensure timing CPU sinks response before sending... |
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| 2015-01-25 |
Ali Saidi | sim: Clean up InstRecord |
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| 2015-01-22 |
Andreas Hansson | mem: Clean up Request initialisation |
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| 2014-12-05 |
Gabe Black | cpu: Only check for PC events on instruction boundaries. |
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| 2014-12-02 |
Andreas Hansson | mem: Assume all dynamic packet data is array allocated |
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| 2014-11-12 |
Ali Saidi | arm: Fix timing wakeup with LLSC |
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| 2014-11-06 |
Marc Orr | x86 isa: This patch attempts an implementation at mwait. |
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| 2014-10-16 |
Andreas Sandberg | cpu: Probe points for basic PMU stats |
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| 2014-09-20 |
Mitch Hayenga | alpha,arm,mips,power,x86,cpu,sim: Cleanup activate... |
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| 2014-09-19 |
Andreas Hansson | arch: Pass faults by const reference where possible |
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| 2014-05-13 |
Curtis Dunham | mem: Refactor assignment of Packet types |
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| 2014-01-24 |
Ali Saidi | cpu: Add support for instructions that zero cache lines. |
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| 2014-01-24 |
Ali Saidi | cpu: Add CPU support for generatig wake up events when... |
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| 2014-01-24 |
Dam Sunwoo | mem: per-thread cache occupancy and per-block ages |
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| 2014-01-24 |
Matt Horsnell | mem: track per-request latencies and access depths... |
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| 2013-08-19 |
Lena Olson | cpu: Accurately count idle cycles for simple cpu |
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| 2013-08-19 |
Andreas Hansson | cpu: Fix timing CPU drain check |
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| 2013-07-18 |
Andreas Hansson | mem: Set the cache line size on a system level |
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| 2013-04-22 |
Dam Sunwoo | sim: separate nextCycle() and clockEdge() in clockedObjects |
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| 2013-02-15 |
Andreas Sandberg | sim: Add a system-global option to bypass caches |
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| 2013-02-15 |
Andreas Sandberg | cpu: Refactor memory system checks |
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| 2013-01-07 |
Andreas Sandberg | cpu: Unify the serialization code for all of the CPU... |
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| 2013-01-07 |
Andreas Sandberg | cpu: Make sure that a drained timing CPU isn't executin... |
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| 2013-01-07 |
Andreas Sandberg | cpu: Rename defer_registration->switched_out |
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| 2013-01-07 |
Andreas Sandberg | cpu: Correctly call parent on switchOut() and takeOverF... |
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| 2013-01-07 |
Andreas Sandberg | cpu: Check that the memory system is in the correct... |
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| 2012-11-02 |
Andreas Sandberg | sim: Move the draining interface into a separate base... |
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| 2012-08-28 |
Andreas Hansson | Clock: Add a Cycles wrapper class and use where applicable |
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| 2012-08-28 |
Andreas Hansson | Clock: Rework clocks to avoid tick-to-cycle transformations |
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| 2012-08-22 |
Andreas Hansson | Packet: Remove NACKs from packet and its use in endpoints |
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| 2012-08-15 |
Anthony Gutierrez | O3,ARM: fix some problems with drain/switchout function... |
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| 2012-06-05 |
Anthony Gutierrez | cpu: Don't init simple and inorder CPUs if they are... |
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| 2012-05-01 |
Andreas Hansson | MEM: Separate requests and responses for timing accesses |
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| 2012-04-14 |
Andreas Hansson | MEM: Remove the Broadcast destination from the packet |
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| 2012-04-14 |
Andreas Hansson | MEM: Separate snoops and normal memory requests/responses |
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| 2012-03-30 |
Andreas Hansson | CPU: Unify initMemProxies across CPUs and simulation... |
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| 2012-02-24 |
Andreas Hansson | CPU: Round-two unifying instr/data CPU ports across... |
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| 2012-02-12 |
Ali Saidi | mem: Add a master ID to each request object. |
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| 2012-02-01 |
Gabe Black | Merge ... head, hopefully the last time for this batch. |
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| 2012-01-31 |
Koan-Sin Tan | clang: Enable compiling gem5 using clang 2.9 and 3.0 |
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| 2012-01-31 |
Gabe Black | Merge with main repository. |
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| 2012-01-29 |
Gabe Black | Yet another merge with the main repository. |
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| 2012-01-28 |
Gabe Black | Merge with the main repo. |
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| 2012-01-16 |
Gabe Black | Merge yet again with the main repository. |
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| 2012-01-17 |
Andreas Hansson | MEM: Simplify ports by removing EventManager |
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| 2012-01-17 |
Andreas Hansson | CPU: Moving towards a more general port across CPU... |
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| 2012-01-17 |
Andreas Hansson | MEM: Add port proxies instead of non-structural ports |
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| 2012-01-07 |
Gabe Black | Another merge with the main repository. |
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| 2012-01-07 |
Gabe Black | Merge with the main repository again. |
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| 2012-01-07 |
Gabe Black | Merge with main repository. |
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| 2011-11-18 |
Gabe Black | SE/FS: Get rid of FULL_SYSTEM in the CPU directory. |
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| 2011-11-01 |
Gabe Black | SE/FS: Expose the same methods on the CPUs in SE and... |
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| 2011-08-07 |
Gabe Black | Translation: Use a pointer type as the template argument. |
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| 2011-07-03 |
Nilay Vaish | Merged with Gabe's recent changes. |
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| 2011-07-03 |
Gabe Black | ExecContext: Rename the readBytes/writeBytes functions... |
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| 2011-07-03 |
Gabe Black | ExecContext: Get rid of the now unused read/write templ... |
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| 2011-05-05 |
Ali Saidi | CPU: Add some useful debug message to the timing simple... |
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| 2011-05-05 |
Ali Saidi | CPU: Fix a case where timing simple cpu faults can... |
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| 2011-04-15 |
Nathan Binkert | trace: reimplement the DTRACE function so it doesn... |
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| 2011-04-15 |
Nathan Binkert | includes: sort all includes |
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| 2011-03-18 |
Ali Saidi | Automated merge with ssh://hg@repo.m5sim.org/m5 |
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| 2011-03-18 |
Ali Saidi | ARM: Detect and skip udelay() functions in linux kernel. |
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| 2011-03-02 |
Gabe Black | Spelling: Fix the a spelling error by changing mmaped... |
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| 2011-02-22 |
Brad Beckmann | m5: merged in hammer fix |
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| 2011-02-16 |
Nathan Binkert | merge alpha system files into tree |
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| 2011-02-12 |
Ali Saidi | SimpleCPU: Fix a case where a DTLB fault redirects... |
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| 2011-02-07 |
Joel Hestness | TimingSimpleCPU: split data sender state fix |
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| 2011-02-07 |
Joel Hestness | mcpat: Adds McPAT performance counters |
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| 2011-01-08 |
Steve Reinhardt | Replace curTick global variable with accessor functions. |
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| 2010-11-15 |
Ali Saidi | CPU: Fix bug when a split transaction is issued to... |
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| 2010-11-08 |
Ali Saidi | ARM/Alpha/Cpu: Change prefetchs to be more like normal... |
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| 2010-10-31 |
Gabe Black | ISA,CPU,etc: Create an ISA defined PC type that abstrac... |
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| 2010-09-30 |
Ali Saidi | CPU/Cache: Fix some errors exposed by valgrind |
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| 2010-09-14 |
Gabe Black | Faults: Pass the StaticInst involved, if any, to a... |
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| 2010-08-26 |
Ali Saidi | CPU: Print out traces for faluting inst when the flag... |
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| 2010-08-13 |
Gabe Black | Merge with head. |
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| 2010-08-13 |
Gabe Black | CPU: Add readBytes and writeBytes functions to the... |
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| 2010-08-13 |
Joel Hestness | TimingSimpleCPU: fix NO_ACCESS memory op handling |
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| 2010-03-27 |
Korey Sewell | m5: merge inorder updates |
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| 2010-03-23 |
Steve Reinhardt | cpu: get rid of uncached access "events" |
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| 2010-03-23 |
Steve Reinhardt | cpu: fix exec tracing memory corruption bug |
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| 2010-03-22 |
Brad Beckmann | TimingSimpleCPU: Fixed uncacacheable request read bug |
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| 2010-02-12 |
Timothy M. Jones | BaseDynInst: Make the TLB translation timing instead... |
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| 2010-01-19 |
Derek Hower | merge |
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| 2009-11-11 |
Gabe Black | Merge with the head. |
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| 2009-11-11 |
Gabe Black | Mem: Eliminate the NO_FAULT request flag. |
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| 2009-09-23 |
Nathan Binkert | arch: nuke arch/isa_specific.hh and move stuff to gener... |
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