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trace: reimplement the DTRACE function so it doesn't use a vector
[gem5.git]
/
src
/
cpu
/
simple
/
timing.cc
2011-04-15
Nathan Binkert
trace: reimplement the DTRACE function so it doesn...
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2011-04-15
Nathan Binkert
includes: sort all includes
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2011-03-18
Ali Saidi
Automated merge with ssh://hg@repo.m5sim.org/m5
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2011-03-18
Ali Saidi
ARM: Detect and skip udelay() functions in linux kernel.
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2011-03-02
Gabe Black
Spelling: Fix the a spelling error by changing mmaped...
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2011-02-22
Brad Beckmann
m5: merged in hammer fix
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2011-02-16
Nathan Binkert
merge alpha system files into tree
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2011-02-12
Ali Saidi
SimpleCPU: Fix a case where a DTLB fault redirects...
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2011-02-07
Joel Hestness
TimingSimpleCPU: split data sender state fix
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2011-02-07
Joel Hestness
mcpat: Adds McPAT performance counters
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2011-01-08
Steve Reinhardt
Replace curTick global variable with accessor functions.
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2010-11-15
Ali Saidi
CPU: Fix bug when a split transaction is issued to...
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2010-11-08
Ali Saidi
ARM/Alpha/Cpu: Change prefetchs to be more like normal...
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2010-10-31
Gabe Black
ISA,CPU,etc: Create an ISA defined PC type that abstrac...
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2010-09-30
Ali Saidi
CPU/Cache: Fix some errors exposed by valgrind
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2010-09-14
Gabe Black
Faults: Pass the StaticInst involved, if any, to a...
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2010-08-26
Ali Saidi
CPU: Print out traces for faluting inst when the flag...
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2010-08-13
Gabe Black
Merge with head.
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2010-08-13
Gabe Black
CPU: Add readBytes and writeBytes functions to the...
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2010-08-13
Joel Hestness
TimingSimpleCPU: fix NO_ACCESS memory op handling
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2010-03-27
Korey Sewell
m5: merge inorder updates
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2010-03-23
Steve Reinhardt
cpu: get rid of uncached access "events"
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2010-03-23
Steve Reinhardt
cpu: fix exec tracing memory corruption bug
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2010-03-22
Brad Beckmann
TimingSimpleCPU: Fixed uncacacheable request read bug
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2010-02-12
Timothy M. Jones
BaseDynInst: Make the TLB translation timing instead...
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2010-01-19
Derek Hower
merge
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2009-11-11
Gabe Black
Merge with the head.
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2009-11-11
Gabe Black
Mem: Eliminate the NO_FAULT request flag.
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2009-09-23
Nathan Binkert
arch: nuke arch/isa_specific.hh and move stuff to gener...
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2009-06-05
Nathan Binkert
types: clean up types, especially signed vs unsigned
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2009-05-26
Nathan Binkert
types: add a type for thread IDs and try to use it...
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2009-04-20
Gabe Black
Mem: Change isLlsc to isLLSC.
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2009-04-19
Gabe Black
Memory: Rename LOCKED for load locked store conditional...
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2009-04-19
Gabe Black
CPU: If the simple CPU is already idle, just return...
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2009-04-09
Nathan Binkert
tlb: More fixing of unified TLB
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2009-04-09
Gabe Black
tlb: Don't separate the TLB classes into an instruction...
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2009-04-06
Gabe Black
Merge ARM into the head. ARM will compile but may not...
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2009-03-12
Steve Reinhardt
cpu: fix minor endian issue with trace output
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2009-02-25
Gabe Black
CPU: Don't fetch when executing a macroop.
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2009-02-25
Gabe Black
CPU: Implement translateTiming which defers to translat...
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2009-02-25
Gabe Black
ISA: Replace the translate functions in the TLBs with...
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2009-02-25
Gabe Black
CPU: Get rid of translate... functions from various...
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2008-11-14
Gabe Black
CPU: Refactor read/write in the simple timing CPU.
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2008-11-10
Gabe Black
CPU: Make unaligned accesses work in the timing simple...
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2008-11-10
Gabe Black
X86: Make the timing simple CPU handle variable length...
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2008-11-03
Lisa Hsu
Add in Context IDs to the simulator. From now on,...
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2008-11-03
Lisa Hsu
make BaseCPU the provider of _cpuId, and cpuId() instea...
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2008-10-27
Clint Smullen
CPU: The API change to EventWrapper did not get propag...
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2008-10-13
Gabe Black
X86: Don't fetch in the simple CPU if you're in the...
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2008-10-09
Nathan Binkert
eventq: convert all usage of events to use the new...
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2008-08-11
Nathan Binkert
params: Convert the CPU objects to use the auto generat...
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2008-07-15
Steve Reinhardt
Use ReadResp instead of LoadLockedResp for LoadLockedRe...
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2008-07-01
Ali Saidi
Make the cached virtPort have a thread context so it...
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2008-07-01
Ali Saidi
After a checkpoint (and thus a stats reset), the not_id...
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2008-06-12
Gabe Black
CPU: Make the simple cpu trace data for loads/stores.
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2008-02-14
Ali Saidi
CPU: move the PC Events code to a place where the code...
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2008-02-11
Steve Reinhardt
Automated merge with file:/home/stever/hg/m5-orig
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2008-02-06
Stephen Hines
Make the Event::description() a const function
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2008-02-06
Stephen Hines
Add base ARM code to M5
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2008-01-02
Steve Reinhardt
Additional comments and helper functions for PrintReq.
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2007-12-16
Ali Saidi
CPU: Update where the simple cpus read their cpu id...
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2007-11-08
Ali Saidi
TimingSimpleCPU: Add some DPRINTFs when the cpu suspend...
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2007-10-31
Steve Reinhardt
Merge in bus DPRINTF changes.
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2007-10-22
Gabe Black
Merge with head.
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2007-10-22
Gabe Black
CPU: Add functions to the "ExecContext"s that translate...
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2007-10-19
Gabe Black
Merge with head.
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2007-10-18
Ali Saidi
CPU: Use the ThreadContext cpu id instead of the params...
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2007-10-03
Gabe Black
Merge with head.
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2007-10-01
Ali Saidi
CPU: fix sparc_fs booting with SimpleTimingCPU.
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2007-09-28
Ali Saidi
Update stats for quiesced cycles
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2007-09-28
Ali Saidi
Rename cycles() function to ticks()
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2007-09-28
Ali Saidi
Update statistics to use cycles properly instead of...
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2007-08-28
Gabe Black
Merge with head.
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2007-08-27
Gabe Black
Merge with head
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2007-08-27
Gabe Black
Simple CPU: Don't trace instructions that fault. Otherw...
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2007-08-27
Gabe Black
Simple CPU: Make sure only instructions which complete...
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2007-08-27
Gabe Black
Address Translation: Make SE mode use an actual TLB...
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2007-08-24
Ali Saidi
Mem: Make errors in the memory system be responses...
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2007-08-05
Gabe Black
Merge with head.
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2007-08-03
Steve Reinhardt
merge from head
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2007-08-01
Nathan Binkert
merge: mips fix to getArgument
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2007-08-01
Gabe Black
Merge with head.
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2007-08-01
Gabe Black
Merge with head.
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2007-07-31
Steve Reinhardt
Merge from head.
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2007-07-29
Steve Reinhardt
Merge Gabe's changes from head.
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2007-07-29
Gabe Black
Merge ... head. style.py was also missing an argument...
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2007-07-29
Nathan Binkert
merge: style.py fix
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2007-07-29
Gabe Black
Merge with head.
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2007-07-29
Gabe Black
Turn the instruction tracing code into pluggable sim...
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2007-07-29
Nathan Binkert
merge whitespace fixes
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2007-07-29
Nathan Binkert
merge whitespace changes
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2007-07-27
Nathan Binkert
Merge python and x86 changes with cache branch
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2007-07-24
Gabe Black
Merge with head.
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2007-07-24
Nathan Binkert
Major changes to how SimObjects are created and initial...
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2007-07-22
Steve Reinhardt
Merge from head.
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2007-07-22
Steve Reinhardt
Merge more changes in from head.
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2007-07-16
Steve Reinhardt
Merge from head.
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2007-07-14
Steve Reinhardt
Merge from head.
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2007-07-14
Steve Reinhardt
Merge of DPRINTF fixes from head.
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2007-07-14
Steve Reinhardt
Merge in .hgignore from head.
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