inorder cpu: add missing DPRINTF argument
[gem5.git] / src / cpu / simple /
2012-11-02 Andreas Sandbergsim: Move the draining interface into a separate base...
2012-11-02 Andreas Sandbergsim: Include object header files in SWIG interfaces
2012-09-25 Ali SaidiARM: Squash outstanding walks when instructions are...
2012-09-19 Andreas HanssonAddrRange: Transition from Range<T> to AddrRange
2012-08-28 Andreas HanssonClock: Add a Cycles wrapper class and use where applicable
2012-08-28 Andreas HanssonClock: Rework clocks to avoid tick-to-cycle transformations
2012-08-22 Andreas HanssonPacket: Remove NACKs from packet and its use in endpoints
2012-08-15 Anthony GutierrezO3,ARM: fix some problems with drain/switchout function...
2012-07-09 Andreas HanssonPort: Align port names in C++ and Python
2012-07-09 Andreas HanssonPort: Move retry from port base class to Master/SlavePort
2012-06-08 Andreas HanssonTiming CPU: Remove a redundant port pointer
2012-06-05 Anthony Gutierrezcpu: Don't init simple and inorder CPUs if they are...
2012-05-26 Gabe BlackCPU: Merge the predecoder and decoder.
2012-05-25 Gabe BlackDecode: Make the Decoder class defined per ISA.
2012-05-01 Andreas HanssonMEM: Separate requests and responses for timing accesses
2012-04-15 Gabe BlackCPU: Tidy up some formatting and a DPRINTF in the simpl...
2012-04-14 Andreas HanssonMEM: Remove the Broadcast destination from the packet
2012-04-14 Andreas HanssonMEM: Separate snoops and normal memory requests/responses
2012-04-06 Andreas HanssonMEM: Enable multiple distributed generalized memories
2012-04-03 Andreas HanssonAtomic: Remove the physmem_port and access memory directly
2012-03-30 William WangMEM: Introduce the master/slave port sub-classes in C++
2012-03-30 Andreas HanssonCPU: Unify initMemProxies across CPUs and simulation...
2012-03-09 Geoffrey BlakeCheckerCPU: Make CheckerCPU runtime selectable instead...
2012-02-24 Andreas HanssonCPU: Round-two unifying instr/data CPU ports across...
2012-02-13 Andreas HanssonMEM: Introduce the master/slave port roles in the Pytho...
2012-02-12 Anthony Gutierrezcpu: add separate stats for insts/ops both globally...
2012-02-12 Ali Saidimem: Add a master ID to each request object.
2012-02-10 Gabe BlackSE/FS: Record the system pointer all the time for the...
2012-02-07 Gabe BlackFaults: Turn off arch/faults.hh
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Koan-Sin Tanclang: Enable compiling gem5 using clang 2.9 and 3.0
2012-01-31 Geoffrey BlakeCheckerCPU: Re-factor CheckerCPU to be compatible with...
2012-01-31 Gabe BlackMerge with main repository.
2012-01-29 Gabe BlackYet another merge with the main repository.
2012-01-29 Gabe BlackImplement Ali's review feedback.
2012-01-28 Gabe BlackMerge with the main repo.
2012-01-16 Gabe BlackMerge yet again with the main repository.
2012-01-17 Andreas HanssonMEM: Separate queries for snooping and address ranges
2012-01-17 Andreas HanssonMEM: Simplify ports by removing EventManager
2012-01-17 Andreas HanssonCPU: Moving towards a more general port across CPU...
2012-01-17 Andreas HanssonMEM: Add port proxies instead of non-structural ports
2012-01-07 Gabe BlackAnother merge with the main repository.
2012-01-07 Gabe BlackMerge with the main repository again.
2012-01-07 Gabe BlackMerge with main repository.
2011-11-18 Gabe BlackSE/FS: Get rid of FULL_SYSTEM in the CPU directory.
2011-11-01 Gabe BlackSE/FS: Get rid of uses of FULL_SYSTEM in Alpha.
2011-11-01 Gabe BlackSE/FS: Expose the same methods on the CPUs in SE and...
2011-09-19 Gabe BlackSyscall: Make the syscall function available in both...
2011-09-09 Gabe BlackDecode: Pull instruction decoding out of the StaticInst...
2011-08-07 Gabe BlackTranslation: Use a pointer type as the template argument.
2011-07-03 Nilay VaishMerged with Gabe's recent changes.
2011-07-03 Gabe BlackExecContext: Rename the readBytes/writeBytes functions...
2011-07-03 Gabe BlackExecContext: Get rid of the now unused read/write templ...
2011-06-03 Nathan Binkertscons: rename TraceFlags to DebugFlags
2011-05-05 Ali SaidiCPU: Add some useful debug message to the timing simple...
2011-05-05 Ali SaidiCPU: Fix a case where timing simple cpu faults can...
2011-04-15 Nathan Binkerttrace: reimplement the DTRACE function so it doesn...
2011-04-15 Nathan Binkertincludes: sort all includes
2011-03-18 Ali SaidiAutomated merge with ssh://hg@repo.m5sim.org/m5
2011-03-18 Ali SaidiARM: Detect and skip udelay() functions in linux kernel.
2011-03-02 Gabe BlackSpelling: Fix the a spelling error by changing mmaped...
2011-02-22 Brad Beckmannm5: merged in hammer fix
2011-02-16 Nathan Binkertmerge alpha system files into tree
2011-02-12 Ali SaidiSimpleCPU: Fix a case where a DTLB fault redirects...
2011-02-12 Giacomo GabrielliO3: Enhance data address translation by supporting...
2011-02-07 Joel HestnessTimingSimpleCPU: split data sender state fix
2011-02-07 Joel Hestnessmcpat: Adds McPAT performance counters
2011-02-04 Gabe BlackConfig: Keep track of uncached and cached ports separately.
2011-01-08 Steve ReinhardtReplace curTick global variable with accessor functions.
2010-12-08 Giacomo GabrielliO3: Make all instructions that write a misc. register...
2010-11-16 Gabe BlackO3: Make O3 support variably lengthed instructions.
2010-11-15 Ali SaidiCPU: Fix bug when a split transaction is issued to...
2010-11-08 Ali SaidiARM/Alpha/Cpu: Change prefetchs to be more like normal...
2010-10-31 Gabe BlackISA,CPU,etc: Create an ISA defined PC type that abstrac...
2010-09-30 Ali SaidiCPU/Cache: Fix some errors exposed by valgrind
2010-09-14 Gabe BlackCPU: Get rid of the now unnecessary getInst/setInst...
2010-09-14 Gabe BlackFaults: Pass the StaticInst involved, if any, to a...
2010-08-31 Gabe BlackCPU: Get rid of the unused ev5_trap function on the...
2010-08-26 Ali SaidiCPU: Print out traces for faluting inst when the flag...
2010-08-23 Min Kyu JeongCPU: Make Exec trace to print predication result (if...
2010-08-23 Min Kyu JeongARM/O3: store the result of the predicate evaluation...
2010-08-13 Gabe BlackMerge with head.
2010-08-13 Gabe BlackCPU: Add readBytes and writeBytes functions to the...
2010-08-13 Gabe BlackCPU: Tidy up endianness handling for mmapped "IPR"s.
2010-08-13 Joel HestnessTimingSimpleCPU: fix NO_ACCESS memory op handling
2010-06-15 Nathan Binkertstats: get rid of the never-really-used event stuff
2010-06-03 Steve ReinhardtMinor remote GDB cleanup.
2010-06-02 Gabe BlackARM: Implement support for the IT instruction and the...
2010-06-02 Ali SaidiCPU: Reset fetch offset after a exception
2010-06-02 Gabe BlackARM: Make the predecoder handle Thumb instructions.
2010-03-27 Korey Sewellm5: merge inorder updates
2010-03-23 Steve Reinhardtcpu: get rid of uncached access "events"
2010-03-23 Steve Reinhardtcpu: fix exec tracing memory corruption bug
2010-03-22 Brad BeckmannTimingSimpleCPU: Fixed uncacacheable request read bug
2010-02-27 Nathan Binkertcpu_models: get rid of cpu_models.py and move the stuff...
2010-02-12 Timothy M. JonesBaseDynInst: Make the TLB translation timing instead...
2010-01-19 Derek Howermerge
2009-11-18 Brad Beckmannm5: Fixed bug in atomic cpu destructor
2009-11-11 Gabe BlackMerge with the head.
2009-11-11 Gabe BlackMem: Eliminate the NO_FAULT request flag.
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