riscv: Fix bugs with RISC-V decoder and detailed CPUs
[gem5.git] / src / cpu / testers /
2017-07-12 Sean Wilsontesters: Refactor some Event subclasses to lambdas
2017-06-20 Sean Wilsoncpu, gpu-compute: Replace EventWrapper use with EventFu...
2016-11-09 Brandon Potterstyle: [patch 3/22] reduce include dependencies in...
2016-11-09 Brandon Potterstyle: [patch 1/22] use /r/3648/ to reorganize includes
2016-12-05 Nikos Nikoleriscpu: Change traffic generators to use different values...
2016-10-06 Tushar Krishnaruby: rename networktest to garnet_synthetic_traffic.
2016-06-20 Andreas Sandbergmem: Resolve TrafficGen trace relative to the config
2016-06-06 David Guillen Fandosstats: Fixing regStats function for some SimObjects
2016-06-06 Stephan Diestelhorstsim: Call regStats of base-class as well
2016-05-26 Andreas Hanssoncpu: Add a basic progress check to the TrafficGen
2016-04-07 Mitch Hayengamem: Remove threadId from memory request class
2016-04-07 Andreas SandbergRevert to 74c1e6513bd0 (sim: Thermal support for Linux)
2016-04-06 Andreas SandbergRevert power patch sets with unexpected interactions
2016-04-05 Mitch Hayengamem: Remove threadId from memory request class
2014-11-18 Akash Bagdiapower: Add power states to ClockedObject
2016-03-20 Andreas Hanssoncpu: warn if TrafficGen is suppressing a large numer...
2016-02-24 Matteo Andreozzicpu: TraceGen fix for tick frequency check
2016-02-07 Steve Reinhardtstyle: remove trailing whitespace
2015-07-20 Brad Beckmannruby: more flexible ruby tester support
2015-11-22 Andreas Hanssoncpu: Fix memory leak in traffic generator
2015-10-12 Andreas Hanssonmisc: Add explicit overrides and fix other clang >...
2015-10-12 Andreas Hanssonmisc: Remove redundant compiler-specific defines
2015-08-29 Nilay Vaishruby: eliminate type uint64 and int64
2015-08-19 Nilay Vaishruby: reverts to changeset: bf82f1f7b040
2015-08-15 Nilay Vaishruby: eliminate type uint64 and int64
2015-08-14 Nilay Vaishruby: replace Address by Addr
2015-08-11 Nilay Vaishruby: drop some redundant includes
2015-07-10 Brandon Potterruby: replace global g_abs_controls with per-RubySystem var
2015-07-07 Andreas Sandbergsim: Refactor and simplify the drain API
2015-07-07 Andreas Sandbergsim: Refactor the serialization base class
2015-03-19 Wendy Elsassercpu: Fix TrafficGen message format
2015-03-02 Andreas Hanssonmem: Split port retry for all different packet classes
2015-03-02 Stephan Diestelhorstcpu: Add a PC-value to the traffic generator requests
2015-02-16 Andreas Hanssoncpu: TrafficGen sinks snoops without complaining
2015-02-11 Andreas Hanssoncpu: Tidy up the MemTest and make false sharing more...
2015-01-22 Andreas Hanssonmem: Clean up Request initialisation
2014-12-02 Andreas Hanssonmem: Assume all dynamic packet data is array allocated
2014-12-02 Andreas Hanssonmem: Add const getters for write packet data
2014-12-02 Andreas Hanssonmem: Remove null-check bypassing in Packet::getPtr
2014-09-27 Andreas Hanssonmisc: Fix a bunch of minor issues identified by static...
2014-09-20 Wendy Elsassercpu: Update DRAM traffic gen
2014-09-19 Andreas Hanssonmisc: Use safe_cast when assumptions are made about...
2014-09-09 Andreas Hanssonmisc: Fix a number of unitialised variables and members
2014-09-03 Andreas Hanssonbase: Use the global Mersenne twister throughout
2014-09-01 Nilay Vaishmem: change the namespace Message to ProtoMessage
2014-09-01 Nilay Vaishruby: eliminate type Time
2014-08-10 Andreas Hanssoncpu: Ensure the traffic generator suppresses non-memory...
2014-03-23 Neha Agarwalcpu: DRAM Traffic Generator
2014-03-23 Stan Czerniawskicpu: Add basic check to TrafficGen initial state
2014-01-30 Xiangyu Dongcpu: fix bug when TrafficGen deschedules event
2013-08-19 Sascha Bischoffcpu: Fix TrafficGen trace playback
2013-07-18 Andreas Hanssonmem: Set the cache line size on a system level
2013-05-30 Sascha Bischoffcpu: Check that minimum TrafficGen period is less than...
2013-05-30 Sascha Bischoffcpu: Fix bug when reading in TrafficGen state transitions
2013-05-30 Andreas Hanssoncpu: Add request elasticity to the traffic generator
2013-05-30 Andreas Hanssoncpu: Block traffic generator when requests have to...
2013-05-30 Andreas Hanssoncpu: Move traffic generator sending out of generator...
2013-05-30 Andreas Hanssoncpu: Fold together the StateGraph and the TrafficGen
2013-04-23 Andreas Hanssoncpu: Fix TraceGen flag initalisation
2013-04-22 Andreas Hanssoncpu: Use request flags in trace playback
2013-04-22 Andreas Hanssoncpu: Make the generators usable outside the TrafficGen...
2013-03-12 Andreas Sandbergcpu: Fix state transition bug in the traffic generator
2013-02-19 Andreas Hanssonscons: Fix warnings issued by clang 3.2svn (XCode 4.6)
2013-02-19 Andreas Hanssonmem: Add predecessor to SenderState base class
2013-02-15 Andreas Sandbergsim: Add a system-global option to bypass caches
2013-01-17 Nilay Vaishruby: remove calls to g_system_ptr->getTime()
2013-01-07 Andreas Hanssoncpu: Share the send functionality between traffic gener...
2013-01-07 Andreas Hanssoncpu: Add support for protobuf input for the trace generator
2013-01-07 Andreas Hanssoncpu: Encapsulate traffic generator input in a stream
2013-01-07 Andreas Hanssoncpu: Fix the traffic gen read percentage
2012-12-11 Nilay Vaishruby: modify the directed tester to read/write streams
2012-11-02 Andreas Sandbergsim: Move the draining interface into a separate base...
2012-11-02 Andreas Sandbergsim: Include object header files in SWIG interfaces
2012-10-15 Nilay Vaishmemtest: move check on outstanding requests
2012-10-15 Andreas HanssonPort: Add protocol-agnostic ports in the port hierarchy
2012-09-21 Andreas HanssonTrafficGen: Add a basic traffic generator
2012-09-11 Nilay VaishRuby: Use uint8_t instead of uint8 everywhere
2012-08-28 Andreas HanssonClock: Add a Cycles wrapper class and use where applicable
2012-08-28 Andreas HanssonClock: Rework clocks to avoid tick-to-cycle transformations
2012-08-27 Nilay VaishRuby: Remove RubyEventQueue
2012-08-21 Andreas HanssonClock: Move the clock and related functions to ClockedO...
2012-07-11 Brad Beckmannruby: remove the cpu assumptions for the random tester
2012-06-05 Ali Saidisim: Remove FastAlloc
2012-05-30 Andreas HanssonPacket: Unify the use of PortID in packet and port
2012-05-01 Andreas HanssonMEM: Separate requests and responses for timing accesses
2012-04-25 Andreas HanssonMEM: Add the PortId type and a corresponding id field...
2012-04-14 Andreas HanssonRuby: Use MasterPort base-class pointers where possible
2012-04-14 Andreas HanssonMEM: Remove the Broadcast destination from the packet
2012-04-14 Andreas HanssonMEM: Separate snoops and normal memory requests/responses
2012-04-07 Brad Beckmannrubytest: remove spurious printf
2012-04-06 Brad Beckmannrubytest: seperated read and write ports.
2012-04-05 Tushar KrishnaNetworkTest: remove unnecessary memory allocation
2012-03-30 William WangMEM: Introduce the master/slave port sub-classes in C++
2012-03-22 Andreas HanssonScons: Remove Werror=False in SConscript files
2012-02-24 Andreas HanssonRuby: Simplify tester ports by not using SimpleTimingPort
2012-02-24 Andreas HanssonMEM: Move all read/write blob functions from Port to...
2012-02-24 Andreas HanssonMEM: Move port creation to the memory object(s) constru...
2012-02-13 Andreas HanssonMEM: Introduce the master/slave port roles in the Pytho...
2012-02-12 Ali Saidimem: Add a master ID to each request object.
2012-01-28 Gabe BlackMerge with the main repo.
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