kvm: Make MMIO requests uncacheable
[gem5.git] / src / cpu /
2013-05-02 Andreas Sandbergkvm: Make MMIO requests uncacheable
2013-04-23 Andreas Hanssoncpu: Fix TraceGen flag initalisation
2013-04-22 Andreas Hanssoncpu: Use request flags in trace playback
2013-04-22 Andreas Hanssoncpu: Make the generators usable outside the TrafficGen...
2013-04-22 Andreas Sandbergkvm: Add support for pseudo-ops on ARM
2013-04-22 Andreas Sandbergkvm: Add support for state dumping on ARM
2013-04-22 Andreas Sandbergkvm: Add basic support for ARM
2013-04-22 Andreas Sandbergkvm: Add experimental support for a perf-based executio...
2013-04-22 Andreas Sandbergkvm: Avoid synchronizing the TC on every KVM exit
2013-04-22 Andreas Sandbergkvm: Basic support for hardware virtualized CPUs
2013-04-22 Timothy M. Jonescpu: Let python scripts obtain the number of instructio...
2013-04-22 Andreas Sandbergarm: Enable support for triggering a sim panic on kerne...
2013-04-22 Dam Sunwoosim: separate nextCycle() and clockEdge() in clockedObjects
2013-04-22 Dam Sunwoocpu: generate SimPoint basic block vector profiles
2013-04-22 Ali Saidicpu: fix a switching issue with the o3 cpu. stable_2013_06_16
2013-03-29 Nilay Vaisho3cpu: commit: changes interrupt handling
2013-03-26 Andreas Hanssoncpu: Remove CpuPort and use MasterPort in the CPU classes
2013-03-20 Andreas Hanssoncpu: Avoid including inorder TLBUnit to avoid gcc LTO bug
2013-03-12 Andreas Sandbergcpu: Fix state transition bug in the traffic generator
2013-03-05 Ali Saidicpu: fix a switching issue with the o3 cpu.
2013-02-19 Andreas Hanssonscons: Fix warnings issued by clang 3.2svn (XCode 4.6)
2013-02-19 Andreas Hanssonscons: Add warning for missing declarations
2013-02-19 Andreas Hanssonscons: Fix up numerous warnings about name shadowing
2013-02-19 Andreas Hanssonx86: Move APIC clock divider to Python
2013-02-19 Andreas Hanssonmem: Add predecessor to SenderState base class
2013-02-15 Andreas Sandbergcpu: Document exec trace flags
2013-02-15 Geoffrey Blakecpu: Avoid duplicate entries in tracking structures...
2013-02-15 Geoffrey Blakecpu: Fix rename mis-handling serializing instructions...
2013-02-15 Matt Horsnello3: fix tick used for renaming and issue with range...
2013-02-15 Andreas Sandbergsim: Add a system-global option to bypass caches
2013-02-15 Andreas Sandbergcpu: Refactor memory system checks
2013-02-15 Andreas Sandbergcpu: Make checker CPUs inherit from CheckerCPU in the...
2013-02-15 Andreas Sandbergcpu: Add CPU metadata om the Python classes
2013-02-15 Ali Saidicpu: include set in o3/commit_impl.
2013-02-15 Ali Saidicpu: fix case with o3 cpu blocking and unblocking decod...
2013-02-15 Ali Saidicpu: Fix a livelock in the o3 cpu.
2013-01-24 Nilay Vaish ext... branch predictor: move out of o3 and inorder cpus
2013-01-22 Andrea Pellegrinio3 cpu: fix zero reg problem
2013-01-22 Nilay Vaishx86, cpu: corrects 270c9a75e91f, take over decoder...
2013-01-19 Joel HestnessO3 IEW: Make incrWb and decrWb clearer
2013-01-17 Nilay Vaishruby: remove calls to g_system_ptr->getTime()
2013-01-13 Nilay Vaishbase simple cpu: removes commented out code about cache ops
2013-01-13 Nilay Vaishx86: Changes to decoder, corrects 9376
2013-01-07 Andreas Sandbergcpu: Unify the serialization code for all of the CPU...
2013-01-07 Andreas Sandbergcpu: Flush TLBs on switchOut()
2013-01-07 Andreas Sandbergcpu: Rewrite O3 draining to avoid stopping in microcode
2013-01-07 Andreas Sandbergcpu: Make sure that a drained atomic CPU isn't executin...
2013-01-07 Andreas Sandbergcpu: Make sure that a drained timing CPU isn't executin...
2013-01-07 Andreas Sandbergcpu: Fix broken thread context handover
2013-01-07 Andreas Sandbergcpu: Fix O3 LSQ debug dumping constness and formatting
2013-01-07 Andreas Sandbergcpu: Fix broken squashAfter implementation in O3 CPU
2013-01-07 Andreas Sandbergo3 cpu: Remove unused variables
2013-01-07 Andreas Sandbergcpu: Rename defer_registration->switched_out
2013-01-07 Andreas Sandbergcpu: Remove unused params.hh header file in inorder CPU
2013-01-07 Andreas Sandbergcpu: Introduce sanity checks when switching between...
2013-01-07 Andreas Sandbergcpu: Correctly call parent on switchOut() and takeOverF...
2013-01-07 Andreas Sandbergcpu: Unify SimpleCPU and O3 CPU serialization code
2013-01-07 Andreas Sandbergcpu: Initialize the O3 pipeline from startup()
2013-01-07 Andreas Sandbergcpu: Implement a flat register interface in thread...
2013-01-07 Andreas Sandbergarch: Move the ISA object to a separate section
2013-01-07 Andreas Sandbergcpu: Check that the memory system is in the correct...
2013-01-07 Andreas Hanssoncpu: Share the send functionality between traffic gener...
2013-01-07 Andreas Hanssoncpu: Add support for protobuf input for the trace generator
2013-01-07 Andreas Hanssoncpu: Encapsulate traffic generator input in a stream
2013-01-07 Andreas Hanssoncpu: Fix the traffic gen read percentage
2013-01-07 Andreas Sandbergarch: Make the ISA class inherit from SimObject
2013-01-07 Ali Saidio3: Fix issue with LLSC ordering and speculation
2013-01-07 Ali Saidicpu: rename the misleading inSyscall to noSquashFromTC
2013-01-05 Gabe BlackDecoder: Remove the thread context get/set from the...
2012-12-11 Nilay Vaishruby: modify the directed tester to read/write streams
2012-12-06 Erik TomuskTournamentBP: Fix some bugs with table sizes and counters
2012-12-06 Malek Muslehinorder cpu: add missing DPRINTF argument
2012-12-06 Nathanael Premillieuo3 cpu: remove some unused buggy functions in the lsq
2012-11-02 Andreas Sandbergsim: Move the draining interface into a separate base...
2012-11-02 Andreas Sandbergcpu: O3 add a header declaring the DerivO3CPU
2012-11-02 Andreas Sandbergcpu: Add header files for checker CPUs
2012-11-02 Andreas Sandbergsim: Include object header files in SWIG interfaces
2012-11-02 Dam SunwooARM: dump stats and process info on context switches
2012-11-02 Mrinmoy Ghosho3: Fix a couple of issues with the local predictor.
2012-10-15 Nilay Vaishmemtest: move check on outstanding requests
2012-10-15 Andreas HanssonPort: Add protocol-agnostic ports in the port hierarchy
2012-10-15 Andreas HanssonFix: Address a few minor issues identified by cppcheck
2012-10-15 Andreas HanssonRegression: Use CPU clock and 32-byte width for L1...
2012-09-25 Ali SaidiO3: Pack the comm structures a bit better to reduce...
2012-09-25 Ali SaidiARM: Squash outstanding walks when instructions are...
2012-09-25 Andreas Sandbergsim: Move CPU-specific methods from SimObject to the...
2012-09-25 Djordje KovacevicCPU: Add abandoned instructions to O3 Pipe Viewer
2012-09-21 Andreas HanssonTrafficGen: Add a basic traffic generator
2012-09-19 Andreas HanssonAddrRange: Transition from Range<T> to AddrRange
2012-09-13 Joel HestnessBase CPU: Initialize profileEvent to NULL
2012-09-12 Anthony Gutierrezstats: remove duplicate instruction stats from the...
2012-09-11 Nilay VaishRuby: Use uint8_t instead of uint8 everywhere
2012-09-07 Ali SaidiO3: Get rid of incorrect assert in RAS.
2012-09-07 Andreas HanssonParam: Transition to Cycles for relevant parameters
2012-08-28 Andreas HanssonClock: Add a Cycles wrapper class and use where applicable
2012-08-28 Andreas HanssonClock: Rework clocks to avoid tick-to-cycle transformations
2012-08-28 Andreas HanssonPort: Stricter port bind/unbind semantics
2012-08-28 Andreas HanssonChecker: Fix checker CPU ports
2012-08-27 Nilay VaishRuby: Remove RubyEventQueue
2012-08-22 Andreas HanssonPacket: Remove NACKs from packet and its use in endpoints
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