sim: Make clang happy
[gem5.git] / src / cpu /
2016-06-06 David Guillen Fandospwr: Low-power idle power state for idle CPUs
2016-06-06 David Guillen Fandosstats: Fixing regStats function for some SimObjects
2016-06-06 Stephan Diestelhorstsim: Call regStats of base-class as well
2016-05-27 Ilias Vougioukascpu: fix lastStopped unserialisation
2016-05-26 Andreas Hanssoncpu: Add a basic progress check to the TrafficGen
2016-04-07 Mitch Hayengamem: Remove threadId from memory request class
2016-04-05 Mitch Hayengacpu: Implement per-thread GHRs
2016-04-05 Mitch Hayengacpu: Add an indirect branch target predictor
2016-04-05 Mitch Hayengacpu: Fix BTB threading oversight
2016-04-07 Andreas SandbergRevert to 74c1e6513bd0 (sim: Thermal support for Linux)
2016-04-06 Andreas SandbergRevert power patch sets with unexpected interactions
2016-04-05 Mitch Hayengamem: Remove threadId from memory request class
2016-04-05 Curtis Dunhamcpu: Implement per-thread GHRs
2016-04-05 Mitch Hayengacpu: Add an indirect branch target predictor
2016-04-05 Mitch Hayengacpu: Fix BTB threading oversight
2014-12-09 Akash Bagdiapower: Low-power idle power state for idle CPUs
2014-11-18 Akash Bagdiapower: Add power states to ClockedObject
2016-04-05 Mitch Hayengacpu: Add instruction opclass histogram to minor
2016-04-05 Geoffrey Blakecpu: Query CPU for inst executed from Python
2016-03-30 Andreas Sandbergkvm: Add an option to force context sync on kvm entry...
2016-03-20 Andreas Hanssoncpu: warn if TrafficGen is suppressing a large numer...
2015-05-05 Rekai Gonzalez Alb... cpu: Change literal integer constants to meaningful...
2015-11-27 Andreas Sandbergkvm: Shutdown KVM and disconnect performance counters...
2015-11-27 Andreas Sandbergbase: Add support for changing output directories
2015-08-10 Stephan Diestelhorstmem, cpu: Add assertions to snoop invalidation logic
2015-07-19 Krishnendra Nathellacpu: Fix LLSC atomic CPU wakeup
2016-02-24 Matteo Andreozzicpu: TraceGen fix for tick frequency check
2016-02-23 Andreas Hanssonscons: Add missing override to appease clang
2016-02-15 Andreas Hanssonmisc: Add missing overrides to appease clang
2016-02-10 Andreas Hanssonmem: Deduce if cache should forward snoops
2016-02-07 Steve Reinhardtstyle: eliminate explicit boolean comparisons
2016-02-07 Steve Reinhardtstyle: fix missing spaces in control statements
2016-02-07 Steve Reinhardtstyle: remove trailing whitespace
2016-01-18 Steve Reinhardtcpu. arch: add initiateMemRead() to ExecContext interface
2016-01-18 Steve Reinhardtcpu: remove unnecessary data ptr from O3 internal read...
2016-01-11 Andreas Hanssonscons: Enable -Wextra by default
2015-12-31 Andreas Hanssonmem: Make cache terminology easier to understand
2015-07-20 Brad Beckmannruby: more flexible ruby tester support
2015-12-07 Radhika Jagtapcpu: Support virtual addr in elastic traces
2015-12-07 Radhika Jagtapcpu: Create record type enum for elastic traces
2015-12-07 Radhika Jagtapcpu: Add TraceCPU to playback elastic traces
2015-12-07 Radhika Jagtapproto, probe: Add elastic trace probe to o3 cpu
2015-12-07 Radhika Jagtapprobe: Add probe in Fetch, IEW, Rename and Commit
2015-12-04 Pau Cabrecpu: fix unitialized variable which may cause assertion...
2015-11-22 Nathanael Premillieucpu: Fix base FP and CC register index in o3 insertThread()
2015-11-22 Andreas Hanssoncpu: Fix memory leak in traffic generator
2015-11-20 Andreas Sandbergcpu: Enforce 1 interrupt controller per thread
2015-11-16 Nilay VaishMerged changesets: 47e2adf7fb1a and b65d4e878ed2
2015-11-16 Nilay Vaisho3: drop unused statistic wbPenalized and wbPenalizedRate
2015-10-12 Andreas Hanssonmisc: Add explicit overrides and fix other clang >...
2015-10-12 Andreas Hanssonmisc: Remove redundant compiler-specific defines
2015-10-09 Rekai Gonzalez Alb... isa: Add parameter to pick different decoder inside ISA
2015-10-07 Steve Reinhardtsim: add ExecMacro to Exec* compound debug flags
2015-09-30 Curtis Dunhambase: remove Trace::enabled flag
2015-09-30 Mitch Hayengacpu,isa,mem: Add per-thread wakeup logic
2015-09-30 Mitch Hayengaisa,cpu: Add support for FS SMT Interrupts
2015-09-30 Mitch Hayengacpu: Add per-thread monitors
2015-09-30 Mitch Hayengaconfig,cpu: Add SMT support to Atomic and Timing CPUs
2015-09-30 Mitch Hayengacpu: Change thread assignments for heterogenous SMT
2015-09-15 Andrew Lukefahrcpu: pred: Local Predictor Reset in Tournament Predictor
2015-09-15 Hongil Yooncpu, o3: consider split requests for LSQ checksnoop...
2015-08-29 Nilay Vaishruby: eliminate type uint64 and int64
2015-08-21 Andreas Hanssonmem: Reflect that packet address and size are always...
2015-08-21 Andreas Hanssoncpu: Move invldPid constant from Request to BaseCPU
2015-08-19 Nilay Vaishruby: reverts to changeset: bf82f1f7b040
2015-08-15 Nilay Vaishruby: eliminate type uint64 and int64
2015-08-14 Nilay Vaishruby: replace Address by Addr
2015-08-11 Nilay Vaishruby: drop some redundant includes
2015-08-07 Andreas Sandbergbase: Declare a type for context IDs
2015-07-20 David Hashecpu: Fixed a bug on where to fetch the next instruction...
2015-07-31 Andreas Sandbergcpu: Update debug message from Fetch1 isDrained() in...
2015-07-31 Andreas Sandbergcpu: Fix Minor drain issues when switched out
2015-07-30 Andreas Sandbergcpu: Only activate thread 0 in Minor if the CPU is...
2015-07-30 Andreas Sandbergcpu: Fix drain issues in the Minor CPU
2015-07-30 Andreas Hanssoncpu: Fix issue identified by UBSan
2015-07-28 Nilay Vaishrevert 5af8f40d8f2c
2015-07-26 Nilay Vaishcpu: implements vector registers
2015-07-26 Nilay Vaishcpu: o3: slight correction to identation in rename_impl.hh
2015-07-10 Brandon Potterruby: replace global g_abs_controls with per-RubySystem var
2015-07-07 Andreas Sandbergsim: Refactor and simplify the drain API
2015-07-07 Andreas Sandbergsim: Make the drain state a global typed enum
2015-07-07 Andreas Sandbergsim: Refactor the serialization base class
2015-07-04 Nilay Vaisho3: correct the number of cc registers in rename map
2015-06-01 Andreas Sandbergkvm, arm: Add support for aarch64
2015-06-01 Andreas Sandbergkvm, arm, dev: Add an in-kernel GIC implementation
2015-06-01 Andreas Sandbergkvm: Handle inst events at the current instruction...
2015-06-01 Andreas Sandbergkvm, arm: Move ARM-specific files to arch/arm/kvm/
2015-05-26 Andrew Bardsleycpu: Fix a bug in counting issued instructions in MinorCPU
2015-05-23 Andreas Sandbergkvm: Fix dumping code for large registers
2015-05-23 Andreas Sandbergkvm, x86: Guard x86-specific APIs in KvmVM
2015-05-15 Andreas Hanssonmisc: Appease gcc 5.1
2015-05-05 Andreas Sandbergmem, cpu: Add a separate flag for strictly ordered...
2015-05-05 Andreas Hanssonmem: Snoop into caches on uncacheable accesses
2015-05-05 Andreas Hanssoncpu: Work around gcc 4.9 issues with Num_OpClasses
2015-04-30 Nilay Vaishcpu: o3: replace issueLatency with bool pipelined
2015-04-30 Nilay Vaishcpu: o3: single cycle default div microop latency on x86
2015-04-22 Brandon Pottercpu: remove conditional check (count > 0) on o3 IQ...
2015-04-20 Andreas Hanssoncpu: Remove the InOrderCPU from the tree
2015-04-14 Malek Muslehconfig, cpu: fix progress interval for switched CPUs
2015-04-13 Dibakar Gopecpu: re-organizes the branch predictor structure.
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