X86: Set up a named constant for the "fold bit" for int register indices.
[gem5.git] / src / cpu /
2009-07-13 Derek Howermerge
2009-07-09 Gabe BlackGet rid of the unused get(Data|Inst)Asid and (inst...
2009-07-09 Gabe BlackRegisters: Add a registers.hh file as an ISA switched...
2009-07-09 Gabe BlackRegisters: Eliminate the ISA defined RegFile class.
2009-07-09 Gabe BlackRegisters: Move the PCs out of the ISAs and into the...
2009-07-09 Gabe BlackARM, Simple CPU: Fix an index and add assert checks.
2009-07-09 Gabe BlackRegisters: Eliminate the ISA defined integer register...
2009-07-09 Gabe BlackRegisters: Eliminate the ISA defined floating point...
2009-07-09 Gabe BlackRegisters: Get rid of the float register width parameter.
2009-07-09 Gabe BlackRegisters: Add an ISA object which replaces the MiscReg...
2009-06-05 Nathan Binkerttypes: clean up types, especially signed vs unsigned
2009-06-05 Nathan Binkertmove: put predictor includes and cc files into the...
2009-05-26 Nathan Binkerttypes: add a type for thread IDs and try to use it...
2009-05-17 Nathan Binkertincludes: sort includes again
2009-05-17 Nathan Binkerttypes: Move stuff for global types into src/base/types.hh
2009-05-13 Korey Sewellcpus: add InOrderCPU to default build
2009-05-12 Korey Sewellinorder-resources: delete events
2009-05-12 Korey Sewellinorder-tlb-cunit: merge the TLB as implicit to any...
2009-05-12 Korey Sewellinorder-tlb: squash insts in TLB correctly
2009-05-12 Korey Sewellinorder-faults: ignore unalign translation faults for...
2009-05-12 Korey Sewellinorder-stc: update interface to handle store conditionals
2009-05-12 Korey Sewellinorder-float: Fix storage of FP results
2009-05-12 Korey Sewellinorder-fetch: update model to use predecoder
2009-05-12 Korey Sewellinorder-mem: clean up allocation/deletion of requests...
2009-05-12 Korey Sewellinorder-mem: skeleton support for prefetch/writehints
2009-05-12 Korey Sewellinorder-o3: allow both to compile together
2009-05-12 Korey Sewellinorder-unified-tlb: use unified TLB instead of old...
2009-05-12 Korey Sewellinorder-miscregs: Fix indexing for misc. reg operands...
2009-05-12 Korey Sewellinorder/alpha-isa: create eaComp object visible to...
2009-05-12 Korey Sewellinorder-bpred: edits to handle non-delay-slot ISAs
2009-05-12 Korey Sewellinorder-alpha-port: initial inorder support of ALPHA
2009-05-05 Korey Sewellcpus: fix cpu progress event
2009-05-05 Korey Sewellmerge code
2009-05-05 Korey Sewellcpus: fix cpu progress event
2009-04-21 Nathan BinkertAutomated merge with ssh://m5sim.org//repo/m5
2009-04-21 Nathan Binkertarm: Unify the ARM tlb. We forgot about this when...
2009-04-21 Steve Reinhardtrequest: rename INST_READ to INST_FETCH.
2009-04-20 Gabe BlackMem: Change isLlsc to isLLSC.
2009-04-19 Gabe BlackCPUs: Make the atomic CPU support locked memory accesses.
2009-04-19 Gabe BlackMemory: Rename LOCKED for load locked store conditional...
2009-04-19 Gabe BlackCPU: If the simple CPU is already idle, just return...
2009-04-18 Korey Sewello3-delay-slot-bpred: fix decode stage handling of uncdt...
2009-04-17 Steve Reinhardto3, inorder: fix FS bug due to initializing ThreadState...
2009-04-16 Steve Reinhardto3: handle fetch with no active threads correctly.
2009-04-16 Steve Reinhardto3: fix {read,set}ArchFloatReg* functions.
2009-04-15 Steve ReinhardtThreadState: initialize status to Halted in constructor.
2009-04-15 Steve ReinhardtGet rid of the Unallocated thread context state.
2009-04-09 Nathan Binkerttlb: More fixing of unified TLB
2009-04-09 Gabe Blacktlb: Don't separate the TLB classes into an instruction...
2009-04-06 Gabe BlackMerge ARM into the head. ARM will compile but may not...
2009-03-12 Steve Reinhardtcpu: fix minor endian issue with trace output
2009-03-07 Nathan Binkertstats: fix duplicate statistics names.
2009-03-06 Nathan Binkertstats: Fix all stats usages to deal with template fixes
2009-03-06 Steve ReinhardtGet rid of 'using namespace' declarations in headers.
2009-03-05 Korey SewellInOrderCPU: Clean up Constructors to initialize variabl...
2009-03-04 Korey SewellGive each resource in InOrder it's own TraceFlag instea...
2009-03-04 Korey SewellRemove unused functions/comments cluttering up the...
2009-03-04 Korey Sewellmake handling of interstage buffers (i.e. StageQueues...
2009-03-04 Korey Sewell InOrder didnt have all it's params set to a default...
2009-03-04 Korey SewellGive TimeBuffer an ID that can be set. Necessary becaus...
2009-03-04 Korey Sewelluse numCycles instead of simTicks to determine CPI...
2009-03-04 Steve ReinhardtO3: Make numThreads error message more helpful.
2009-02-27 Gabe BlackProcesses: Make getting and setting system call argumen...
2009-02-27 Ali SaidiCPA: Add code to automatically record function symbols...
2009-02-25 Gabe BlackCPU: Only look up the nearest symbol in the kernel...
2009-02-25 Gabe BlackCPU: Add a flag to identify a read barrier to the stati...
2009-02-25 Gabe BlackCPU: Don't fetch when executing a macroop.
2009-02-25 Gabe BlackCPU: Implement translateTiming which defers to translat...
2009-02-25 Gabe BlackISA: Replace the translate functions in the TLBs with...
2009-02-25 Gabe BlackCPU: Get rid of translate... functions from various...
2009-02-23 Nathan Binkertdebug: Move debug_break into src/base
2009-02-20 Korey SewellRemove unnecessary building of FreeList/RenameMap in...
2009-02-16 Steve ReinhardtFixes to get prefetching working again.
2009-02-11 Nathan Binkertstyle
2009-02-10 Korey SewellConfigs: Add support for the InOrder CPU model
2009-02-10 Korey SewellInOrder: Import new inorder CPU model from MIPS.
2009-02-10 Korey SewellExeTrace: Allow subclasses of the tracer to define...
2009-02-10 Korey SewellCPU: Prepare CPU models for the new in-order CPU model.
2009-02-01 Gabe BlackCPU: Don't always reset the micro pc on faults. Let...
2009-02-01 Gabe BlackX86: Make sure the predecoder is cleared out for interr...
2009-01-31 Ali SaidiConfig: Cause a fatal() when a parameter without a...
2009-01-26 Gabe BlackCPU: Add a setCPU function to the interrupt objects.
2009-01-24 Nathan Binkertcpu: provide a wakeup mechanism that can be used to...
2009-01-21 Nathan Binkerto3cpu: give a name to the activity recorder for better...
2009-01-20 Nathan Binkertthread_context: move getSystemPtr so SE mode can get...
2009-01-13 Nathan BinkertSCons: centralize the Dir() workaround for newer versio...
2009-01-12 Richard StrongThis fix addresses an ill formed if statement that...
2009-01-07 Gabe BlackTracing: Make tracing aware of macro and micro ops.
2008-12-17 Steve ReinhardtMake Alpha pseudo-insts available from SE mode.
2008-12-17 Gabe BlackSPARC: Truncate syscall args and return values appropri...
2008-12-06 Nathan Binkerteventq: use the flags data structure
2008-11-14 Gabe BlackCPU: Refactor read/write in the simple timing CPU.
2008-11-10 Clint SmullenO3CPU: Make the instcount debugging stuff per-cpu.
2008-11-10 Nathan Binkertmem: update stuff for changes to Packet and Request
2008-11-10 Gabe BlackCPU: Make unaligned accesses work in the timing simple...
2008-11-10 Gabe BlackX86: Make the timing simple CPU handle variable length...
2008-11-05 Lisa HsuRight now a single thread cpu 1 could get assigned...
2008-11-04 Lisa Hsuget rid of all instances of readTid() and getThreadNum...
2008-11-03 Lisa HsuAdd in Context IDs to the simulator. From now on,...
2008-11-03 Lisa HsuMake it so that all thread contexts are registered...
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