git.libre-soc.org Git - gem5.git/history

2012-11-02	Andreas Sandberg	sim: Move the draining interface into a separate base...	blob \| commitdiff \| raw
2012-11-02	Andreas Sandberg	sim: Include object header files in SWIG interfaces	blob \| commitdiff \| raw \| diff to current
2012-10-15	Andreas Hansson	Port: Add protocol-agnostic ports in the port hierarchy	blob \| commitdiff \| raw \| diff to current
2012-03-30	William Wang	MEM: Introduce the master/slave port sub-classes in C++	blob \| commitdiff \| raw \| diff to current
2012-02-24	Andreas Hansson	MEM: Move port creation to the memory object(s) constru...	blob \| commitdiff \| raw \| diff to current
2012-02-13	Andreas Hansson	MEM: Explicit ports and Python binding on CopyEngine	blob \| commitdiff \| raw \| diff to current
2012-01-28	Gabe Black	Merge with the main repo.	blob \| commitdiff \| raw \| diff to current
2012-01-17	Andreas Hansson	MEM: Separate queries for snooping and address ranges	blob \| commitdiff \| raw \| diff to current
2009-04-06	Gabe Black	Merge ARM into the head. ARM will compile but may not...	blob \| commitdiff \| raw \| diff to current
2009-03-06	Nathan Binkert	stats: Fix all stats usages to deal with template fixes	blob \| commitdiff \| raw \| diff to current
2009-02-27	Ali Saidi	CPA: Add annotations to IGbE and CopyEngine device...	blob \| commitdiff \| raw \| diff to current
2009-01-26	Gabe Black	Devices: Make the destructor virtual on the CopyEnginCh...	blob \| commitdiff \| raw \| diff to current
2009-01-17	Ali Saidi	CopyEngine: Implement a I/OAT-like copy engine.	blob \| commitdiff \| raw \| diff to current

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