radeon: enable Hyper-Z on r600g and radeonsi by default
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_nvc0.cpp
2014-07-10 Ilia Mirkinnvc0/ir: fix encoding of offset register into interpola...
2014-07-01 Ilia Mirkinnvc0/ir: fix emitting vertex stream
2014-05-28 Alexandre Courbotnvc0/ir: use SM35 ISA with GK20A
2014-04-28 Ilia Mirkinnv50/ir: change texture offsets to ValueRefs, allow...
2014-04-28 Ilia Mirkinnvc0/ir: add support for new bitfield manipulation...
2014-04-26 Ilia Mirkinnvc0: add support for PIPE_CAP_SAMPLE_SHADING
2014-04-07 Ilia Mirkinnvc0: add support for texture gather
2014-04-07 Ilia Mirkinnvc0: enable texture query lod
2014-02-07 Christoph Bumillernvc0/ir/emit: hardcode vertex output stream to 0 for now
2014-01-27 Ilia Mirkinnouveau/codegen: set dType to S32 for OP_NEG U32
2013-09-11 Johannes ObermayrMove nv30, nv50 and nvc0 to nouveau.