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radeon/llvm: improve cube map handling
[mesa.git]
/
src
/
gallium
/
drivers
/
radeon
/
R600Instructions.td
2012-10-10
Vincent Lejeune
radeon/llvm: use floor intrinsic instead of llvm.AMDIL...
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2012-10-10
Vincent Lejeune
radeon/llvm: use llvm intrinsic for flog2
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2012-10-10
Vincent Lejeune
radeon/llvm: add support for cos/sin intrinsic
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2012-10-10
Vincent Lejeune
radeon/llvm: add a pattern for fsqrt
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2012-09-26
Vincent Lejeune
radeon/llvm: improve select_cc lowering to generate...
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2012-09-22
Vincent Lejeune
radeon/llvm: support for interpolation intrinsics
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2012-09-21
Tom Stellard
radeon/llvm: Handle loads from the constants address...
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2012-09-21
Tom Stellard
radeon/llvm: Add support for v4f32 stores on R600
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2012-09-21
Tom Stellard
radeon/llvm: Add support for i8 reads on R600
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2012-09-19
Michal Sciubidlo
radeon/llvm: Emit ISA for ALU instructions in the R600...
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2012-09-18
Vincent Lejeune
radeon/llvm: Add a fdiv pattern.
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2012-09-13
Tom Stellard
radeon/llvm: Fix lowering of vbuild
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2012-08-31
Tom Stellard
radeon/llvm: Fix isEG tablegen predicate
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2012-08-24
Tom Stellard
radeon/llvm: Cleanup R600Instructions.td
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2012-08-23
Tom Stellard
radeon/llvm: Set End of Program bit on RAT instructions
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2012-08-23
Tom Stellard
radeon/llvm: Lower RETFLAG DAG Node to S_ENDPGM on SI
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2012-08-23
Tom Stellard
radeon/llvm: Mark JUMP as a pseudo instruction
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2012-08-23
Tom Stellard
radeon/llvm: Add flag operand to some instructions
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2012-08-21
Tom Stellard
radeon/llvm: ExpandSpecialInstrs - Add support for...
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2012-08-16
Tom Stellard
radeon/llvm: Lower implicit parameters before ISel
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2012-08-15
Vincent Lejeune
radeon/llvm: Add a predicated JUMP instruction
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2012-08-15
Vincent Lejeune
radeon/llvm: Support for predicate bit
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2012-08-15
Tom Stellard
radeon/llvm: Add live-in registers during DAG lowering
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2012-08-15
Tom Stellard
radeon/llvm: Lower store_output intrinsic during DAG...
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2012-08-15
Tom Stellard
radeon/llvm: Force VTX_READ instructions to use same...
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2012-08-02
Tom Stellard
radeon/llvm: Remove CMOVLOG DAG node
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2012-07-30
Tom Stellard
radeon/llvm: Rename all AMDIL* classes to AMDGPU*
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2012-07-27
Tom Stellard
radeon/llvm: Move conditional pattern leafs to common...
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2012-07-11
Tom Stellard
radeon/llvm: Use multiclasses for floating point loads
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2012-07-09
Tom Stellard
radeon/llvm: Rename namespace from AMDIL to AMDGPU
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2012-06-29
Tom Stellard
radeon/llvm: Enable vec4 loads on R600
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2012-06-29
Tom Stellard
radeon/llvm: Enable floating point stores on R600
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2012-06-29
Tom Stellard
radeon/llvm: Emit raw ISA for vertex fetch instructions
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2012-06-21
Tom Stellard
radeon/llvm: Turn on the BitExtract peephole optimization
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2012-06-21
Tom Stellard
radeon/llvm: Lower ROTL to BIT_ALIGN
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2012-06-19
Török Edwin
radeon/llvm: Fix sin/cos codegen on R700
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2012-06-07
Tom Stellard
radeon/llvm: Emulate RECIP_UINT instruction on Cayman
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2012-06-07
Tom Stellard
radeon/llvm: Fix MULLO* instructions on Cayman
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2012-06-06
Tom Stellard
r600g: Compute support for Cayman
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2012-06-06
Tom Stellard
radeon/llvm: Remove AMDIL VCREATE* instructions
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2012-06-06
Tom Stellard
radeon/llvm: Remove AMDIL LOADCONST* instructions
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2012-06-01
Tom Stellard
radeon/llvm: Fix VTX_READ patterns
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2012-06-01
Tom Stellard
radeon/llvm: Remove AMDIL GLOBALSTORE* instructions
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2012-06-01
Tom Stellard
radeon/llvm: Remove AMDIL GLOBALLOAD* instructions
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2012-05-25
Tom Stellard
radeon/llvm: Use a custom inserter for MASK_WRITE
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2012-05-25
Tom Stellard
radeon/llvm: Use tablegen pattern to lower bitconvert
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2012-05-25
Tom Stellard
radeon/llvm: Use a custom inserter to lower FNEG
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2012-05-25
Tom Stellard
radeon/llvm: Use a custom inserter to lower CLAMP
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2012-05-25
Tom Stellard
radeon/llvm: Use a custom inserter to lower FABS
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2012-05-25
Vadim Girlin
radeon/llvm: add FLT_TO_UINT, UINT_TO_FLT instructions
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2012-05-25
Vadim Girlin
radeon/llvm: prepare to revert the round mode state...
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2012-05-25
Vadim Girlin
radeon/llvm: fix opcode for RECIP_UINT_r600
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2012-05-24
Tom Stellard
radeon/llvm: Lower UDIV using the Selection DAG
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2012-05-24
Tom Stellard
radeon/llvm: Remove auto-generated AMDIL->ISA conversio...
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2012-05-24
Tom Stellard
radeon/llvm: Remove AMDIL instructions MULHI, SMUL
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2012-05-24
Tom Stellard
radeon/llvm: Remove AMDIL bitshift instructions (SHL...
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2012-05-24
Tom Stellard
radeon/llvm: Remove AMDIL FTOI and ITOF instructions
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2012-05-24
Tom Stellard
radeon/llvm: Remove AMDIL EXP* instructions
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2012-05-24
Tom Stellard
radeon/llvm: Remove AMDIL ADD instructions
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2012-05-24
Tom Stellard
radeon/llvm: Remove AMDIL binary instrutions (OR, AND...
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2012-05-24
Tom Stellard
radeon/llvm: Remove AMDIL ROUND_NEAREST instruction
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2012-05-24
Tom Stellard
radeon/llvm: Remove AMDIL ROUND_POSINF instruction
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2012-05-24
Tom Stellard
radeon/llvm: Add custom SDNode for FRACT
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2012-05-24
Tom Stellard
radeon/llvm: Use -1 as true value for SET* integer...
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2012-05-20
Tom Stellard
radeon/llvm: Handle selectcc DAG node
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2012-05-18
Tom Stellard
radeon/llvm: Add DAG nodes for MIN instructions
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2012-05-17
Tom Stellard
radeon/llvm: Lower lrp intrinsic during ISel
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2012-05-17
Tom Stellard
radeon/llvm: Remove AMDIL MAD instruction defs
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2012-05-17
Tom Stellard
radeon/llvm: Remove AMDIL MUL_IEEE* instructions
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2012-05-17
Tom Stellard
radeon/llvm: Remove AMDIL floating-point ADD instructio...
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2012-05-17
Tom Stellard
radeon/llvm: Remove AMDIL CMOVLOG* instruction defs
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2012-05-17
Tom Stellard
radeon/llvm: Remove sub patterns from AMDILInstrPatterns.td
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2012-05-17
Tom Stellard
radeon/llvm: Add custom SDNodes for MAX
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2012-05-15
Vadim Girlin
radeon/llvm: add support for texture offsets, fix TEX_LD
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2012-05-15
Vadim Girlin
radeon/llvm: add SET_GRADIENTS*, fix SAMPLE_G
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2012-05-15
Vadim Girlin
radeon/llvm: use correct intrinsic for CEIL
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2012-05-11
Marek Olšák
Merge branch 'master' of ssh://git.freedesktop.org...
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2012-05-11
Marek Olšák
Merge branch 'gallium-userbuf'
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2012-05-11
Tom Stellard
radeon/llvm: Fix Evergreen/Cayman tablegen predicates
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2012-05-10
Tom Stellard
radeon/llvm: Add some comments
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2012-05-10
Tom Stellard
radeon/llvm: Auto-encode RAT_WRITE_CACHELESS_eg
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2012-05-09
Tom Stellard
radeon/llvm: Don't rely on tablegen for lowering int_AM...
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2012-05-08
Tom Stellard
radeon/llvm: Remove the EXPORT_REG instruction
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2012-05-08
Tom Stellard
radeon/llvm: Use a custom inserter to lower RESERVE_REG
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2012-05-08
Tom Stellard
radeon/llvm: Use a custom inserter to lower STORE_OUTPUT
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2012-05-08
Tom Stellard
radeon/llvm: Use a custom inserter to lower LOAD_INPUT
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2012-05-07
Vadim Girlin
radeon/llvm: add support for CUBE ALU instruction
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2012-05-07
Vadim Girlin
radeon/llvm: add support for some ALU instructions
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2012-05-07
Vadim Girlin
radeon/llvm: add support for AHSR/LSHR/LSHL instructions
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2012-05-07
Vadim Girlin
radeon/llvm: add support for TXQ/TXF/DDX/DDY instructions
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2012-05-07
Vadim Girlin
radeon/llvm: add support for v4i32
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2012-04-30
Dragomir Ivanov
r600g/llvm: Add pattern for llvm.AMDGPU.kill v2
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2012-04-23
Tom Stellard
r600g/llvm: Let ISel handle lowering to {INSERT,EXTRACT...
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2012-04-23
Tom Stellard
r600/llvm: Add LOAD_VTX instruction
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2012-04-13
Tom Stellard
radeonsi: initial WIP SI code
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