radeon/llvm: Handle loads from the constants address space.
[mesa.git] / src / gallium / drivers / radeon /
2012-09-21 Tom Stellardradeon/llvm: Handle loads from the constants address...
2012-09-21 Tom Stellardradeon/llvm: Add support for v4f32 stores on R600
2012-09-21 Tom Stellardradeon/llvm: Add support for i8 reads on R600
2012-09-21 Tom Stellardradeon/llvm: Expand vector fadd and fmul on R600
2012-09-21 Tom Stellardradeon/llvm: Add optimization for FP_ROUND
2012-09-21 Tom Stellardradeon/llvm: Replace AMDGPU pow intrinsic with the...
2012-09-19 Michal Sciubidloradeon/llvm: Emit ISA for ALU instructions in the R600...
2012-09-19 Tom Stellardradeon/llvm: Only support 512 constant registers on...
2012-09-18 Vincent Lejeuneradeon/llvm: Add a fdiv pattern.
2012-09-18 Vincent Lejeuneradeon/llvm: reserve also corresponding 128bits reg
2012-09-17 Tom Stellardradeon/llvm: Inital flow control support for SI
2012-09-17 Tom Stellardradeon/llvm: Fix unused variable warning
2012-09-17 Tom Stellardradeon/llvm: Move kernel arg lowering into R600TargetLo...
2012-09-17 Michel Dänzerradeon/llvm: Match integer add/sub for SI.
2012-09-17 Michel Dänzerradeon/llvm: Complete integer comparison patterns for SI.
2012-09-17 Michel Dänzerradeon/llvm: Match AMDGPUfract on SI.
2012-09-17 Michel Dänzerradeon/llvm: Match int_AMDGPU_floor for SI.
2012-09-17 Michel Dänzerradeon/llvm: Match vector logical operations on SI.
2012-09-14 Christian Königradeon/llvm: Support frint on SI
2012-09-13 Tom Stellardradeon/llvm: Fix lowering of vbuild
2012-09-13 Tom Stellardradeon/llvm: Support fmul on SI
2012-09-11 Tom Stellardradeon/llvm: Fix operand order of V_CNDMASK in custom...
2012-09-11 Tom Stellardradeon/llvm: Assert if we try to encode an unknown...
2012-09-11 Tom Stellardradeon/llvm: Add register encoding for VCC
2012-09-11 Tom Stellardradeon/llvm: Ignore special registers when calculating...
2012-09-11 Tom Stellardradeonsi: Handle position input parameter for pixel...
2012-09-11 Tom Stellardradeon/llvm: Coding style fixes
2012-09-11 Tom Stellardradeonsi: Move interpolation mode check into the compiler
2012-09-11 Tom Stellardradeon/llvm: Add SHADER_TYPE instruction
2012-09-07 Michel Dänzerradeon/llvm: Match fexp2 for SI.
2012-09-06 Michel Dänzerradeon/llvm: Add intrinsic for enabling whole quad...
2012-09-06 Michel Dänzerradeon/llvm: SI shader vector instructions implicitly...
2012-09-06 Michel Dänzerradeon/llvm: Extend SI EXEC register support.
2012-09-06 Tom Stellardradeon/llvm: Remove R600InstrInfo.td from TD_FILES
2012-09-06 Tom Stellardradeon/llvm: Cleanup makefile
2012-09-05 Tom Stellardradeon/llvm: Fix operand ordering for V_CNDMASK_B32
2012-09-05 Tom Stellardradeon/llvm: Use correct float->int conversion opcode...
2012-09-04 Tom Stellardradeon/llvm: Fix lowering of SI_V_CNDLT
2012-09-04 Tom Stellardradeon/llvm: Fix encoding of V_CNDMASK_B32
2012-09-04 Vincent Lejeuneradeon/llvm: do not convert f32 operand of select_cc...
2012-09-04 Vincent Lejeuneradeon/llvm: custom lowering for FP_TO_UINT when dst...
2012-09-04 Vincent Lejeuneradeon/llvm: support setcc on f32
2012-09-04 Vincent Lejeuneradon/llvm: br_cc f32 now lowered without cast
2012-09-04 Vincent Lejeuneradeon/llvm: swap wrong OPCODE_IS_*_ZERO_* opcode and use
2012-09-04 Christian Königradeon/llvm: fix SelectADDR8BitOffset
2012-08-31 Tom Stellardradeon/llvm: Rework how immediate operands are handled...
2012-08-31 Tom Stellardradeon/llvm: Fix typo in assert
2012-08-31 Tom Stellardradeon/llvm: Fix isEG tablegen predicate
2012-08-31 Tom Stellardradeon/llvm: Add support for RCP instruction on SI
2012-08-31 Tom Stellardradeon/llvm: Support AMDGPUfmin DAG node on SI
2012-08-29 Tom Stellardradeon/llvm: Fix encoding of FP immediates on SI
2012-08-29 Tom Stellardradeon/llvm: Create a register class for the M0 register
2012-08-29 Tom Stellardradeon/llvm: Set the neverHasSideEffects bit on more...
2012-08-29 Tom Stellardradeon/llvm: Declare the interpolation intrinsics as...
2012-08-29 Tom Stellardradeon/llvm: Mark M0 as a def when lowering interpolati...
2012-08-28 Michel Dänzerradeon/llvm: Handle TGSI KIL opcode for SI.
2012-08-28 Michel Dänzerradeon/llvm: Basic support for SI EXEC register.
2012-08-27 Michel Dänzerradeonsi: Use FP16 shader export format when necessary...
2012-08-24 Tom Stellardradeon/llvm: Cleanup R600Instructions.td
2012-08-23 Tom Stellardradeon/llvm: Set End of Program bit on RAT instructions
2012-08-23 Tom Stellardradeon/llvm: Use correct instruction for moving immediates
2012-08-23 Tom Stellardradeon/llvm: Fix some coding style issues
2012-08-23 Tom Stellardradeon/llvm: Pull changes from external version of...
2012-08-23 Tom Stellardradeon/llvm: Simplify the convert to ISA pass
2012-08-23 Tom Stellardradeon/llvm: Make sure to use the Text section in the...
2012-08-23 Tom Stellardradeon/llvm: Use the MCCodeEmitter for R600
2012-08-23 Tom Stellardradeon/llvm: Use the MCCodeEmitter for SI
2012-08-23 Tom Stellardradeon/llvm: Set 64BitPtr feature bit for SI
2012-08-23 Tom Stellardradeon/llvm: Lower RETFLAG DAG Node to S_ENDPGM on SI
2012-08-23 Tom Stellardradeon/llvm: Add AsmPrinter
2012-08-23 Tom Stellardradeon/llvm: Mark JUMP as a pseudo instruction
2012-08-23 Tom Stellardradeon/llvm: Remove the last uses of MachineOperand...
2012-08-23 Tom Stellardradeon/llvm: Add flag operand to some instructions
2012-08-23 Tom Stellardradeon/llvm: Encapsulate setting of MachineOperand...
2012-08-21 Tom Stellardradeon/llvm: ExpandSpecialInstrs - Add support for...
2012-08-21 Tom Stellardradeon/llvm: ExpandSpecialInstrs - Add support for...
2012-08-21 Tom Stellardradeon/llvm: Add R600ExpandSpecialInstrs pass
2012-08-21 Tom Stellardradeon/llvm: Add helper function for getting sub reg...
2012-08-20 Mathias Fröhlichradeon-llvm: Start multithreaded before using llvm.
2012-08-16 Tom Stellardradeon/llvm: Lower implicit parameters before ISel
2012-08-15 Vincent Lejeuneradeon/llvm: Enable if-cvt
2012-08-15 Vincent Lejeuneradeon/llvm: Add callbacks needed by if-cvt
2012-08-15 Vincent Lejeuneradeon/llvm: Lower branch/branch_cond into predicated...
2012-08-15 Vincent Lejeuneradeon/llvm: Add a predicated JUMP instruction
2012-08-15 Vincent Lejeuneradeon/llvm: Support for predicate bit
2012-08-15 Christian Königradeon/llvm: add support to fetch temps as vectors
2012-08-15 Tom Stellardradeon/llvm: Remove AMDGPUUtil.cpp
2012-08-15 Apostolos Bartziokasradeon/llvm: Cleanup AMDGPUUtil.cpp
2012-08-15 Tom Stellardradeon/llvm: Lower loads from USE_SGPR adddress space...
2012-08-15 Tom Stellardradeon/llvm: Add live-in registers during DAG lowering
2012-08-15 Tom Stellardradeon/llvm: Lower store_output intrinsic during DAG...
2012-08-15 Tom Stellardradeon/llvm: Force VTX_READ instructions to use same...
2012-08-14 Tom Stellardradeon/llvm: Inline immediate offset when lowering...
2012-08-14 Tom Stellardradeon/llvm: Use correct opcocde for BREAK_LOGICALNZ_i32
2012-08-02 Tom Stellardradeon/llvm: Add $(LLVM_LDFLAGS) to the loader linker...
2012-08-02 Tom Stellardradeon/llvm: Add support for more f32 CMP instructions...
2012-08-02 Tom Stellardradeon/llvm: Add support for fneg on SI
2012-08-02 Tom Stellardradeon/llvm: Add support for fp_to_sint on SI
2012-08-02 Tom Stellardradeon/llvm: Remove CMOVLOG DAG node
2012-08-02 Michel Dänzerradeonsi: Handle TGSI DIV opcode.
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