gallivm: fix up size queries for dx10 sviewinfo opcode
[mesa.git] / src / gallium / drivers / radeon /
2013-02-04 Michel Dänzerradeonsi: Adapt to sample intrinsics changes.
2013-01-28 Vadim Girlinr600g: improve inputs/interpolation handling with llvm...
2013-01-22 Michel Dänzerradeon/llvm: Handle LP_CHAN_ALL in emit_fetch_immediate().
2013-01-18 Vincent Lejeuner600g/llvm: tgsi to llvm emits store.swizzle intrinsic...
2013-01-18 Vincent Lejeuner600g/llvm: tgsi to llvm emits stream output intrinsics.
2013-01-18 Vincent Lejeuner600g/llvm:translate ARL opcode to a simple cast
2013-01-18 Vadim Girlinr600g/llvm: rework handling of the constants
2013-01-11 Tom Stellarddrivers/radeon: Don't link against libgallium.la
2013-01-10 Tom Stellardradeon/llvm: Convert to Automake
2013-01-04 Tom Stellardradeon/llvm: Remove backend code from Mesa
2013-01-04 Johannes ObermayrSupport LLVM >= 3.2 on radeonsi and opencl.
2012-12-18 Vadim Girlinradeon/llvm: improve cube map handling
2012-12-18 Vadim Girlinradeon/llvm: fix TXQ_LZ handling for cube maps
2012-12-06 Michel Dänzerradeon/llvm: Export prepare_cube_coords helper to driver.
2012-12-05 Vincent Lejeuner600g: use default action for min/max opcode in tgsi...
2012-12-05 Vincent Lejeuner600g: use default action for fdiv/rcp opcode
2012-12-05 Vincent Lejeuner600g: Use default mul/mad function for tgsi-to-llvm
2012-11-02 Vincent Lejeuner600g: make tgsi-to-llvm generates store.pixel* intrins...
2012-10-26 Michel Dänzerradeon/llvm: Add intrinsic for reading SI FRONT_FACE...
2012-10-19 Tom Stellardradeon/llvm: Sort tgsi opcode action initialization
2012-10-19 Tom Stellardradeon/llvm: Fix lowering TGSI_OPCODE_SSG
2012-10-11 Tom Stellardradeon/llvm: Fix build with LLVM 3.2
2012-10-10 Vincent Lejeuneradeon/llvm: use ceil intrinsic instead of llvm.AMDIL...
2012-10-10 Vincent Lejeuneradeon/llvm: use floor intrinsic instead of llvm.AMDIL...
2012-10-10 Vincent Lejeuneradeon/llvm: use llvm fabs intrinsic
2012-10-10 Vincent Lejeuneradeon/llvm: use llvm intrinsic for flog2
2012-10-10 Vincent Lejeuneradeon/llvm: add support for cos/sin intrinsic
2012-10-10 Vincent Lejeuneradeon/llvm: add a pattern for fsqrt
2012-10-02 Michel Dänzerradeon/llvm: Disable SI flow control again for now.
2012-10-01 Tom Stellardradeon/llvm: Only initialize the AMDGPU target
2012-10-01 Tom Stellardradeon: Fix build with LLVM 3.1
2012-10-01 Tom Stellardradeon: Support LLVM 3.2
2012-09-27 Vincent Lejeuner600g: add some members to radeon_llvm_context
2012-09-26 Vincent Lejeuneradeon/llvm: improve select_cc lowering to generate...
2012-09-24 Tom Stellardradeon/llvm: Fix instruction encoding for r600 family...
2012-09-22 Vincent Lejeuneradeon/llvm: support for interpolation intrinsics
2012-09-21 Tom Stellardradeon/llvm: Handle loads from the constants address...
2012-09-21 Tom Stellardradeon/llvm: Add support for v4f32 stores on R600
2012-09-21 Tom Stellardradeon/llvm: Add support for i8 reads on R600
2012-09-21 Tom Stellardradeon/llvm: Expand vector fadd and fmul on R600
2012-09-21 Tom Stellardradeon/llvm: Add optimization for FP_ROUND
2012-09-21 Tom Stellardradeon/llvm: Replace AMDGPU pow intrinsic with the...
2012-09-19 Michal Sciubidloradeon/llvm: Emit ISA for ALU instructions in the R600...
2012-09-19 Tom Stellardradeon/llvm: Only support 512 constant registers on...
2012-09-18 Vincent Lejeuneradeon/llvm: Add a fdiv pattern.
2012-09-18 Vincent Lejeuneradeon/llvm: reserve also corresponding 128bits reg
2012-09-17 Tom Stellardradeon/llvm: Inital flow control support for SI
2012-09-17 Tom Stellardradeon/llvm: Fix unused variable warning
2012-09-17 Tom Stellardradeon/llvm: Move kernel arg lowering into R600TargetLo...
2012-09-17 Michel Dänzerradeon/llvm: Match integer add/sub for SI.
2012-09-17 Michel Dänzerradeon/llvm: Complete integer comparison patterns for SI.
2012-09-17 Michel Dänzerradeon/llvm: Match AMDGPUfract on SI.
2012-09-17 Michel Dänzerradeon/llvm: Match int_AMDGPU_floor for SI.
2012-09-17 Michel Dänzerradeon/llvm: Match vector logical operations on SI.
2012-09-14 Christian Königradeon/llvm: Support frint on SI
2012-09-13 Tom Stellardradeon/llvm: Fix lowering of vbuild
2012-09-13 Tom Stellardradeon/llvm: Support fmul on SI
2012-09-11 Tom Stellardradeon/llvm: Fix operand order of V_CNDMASK in custom...
2012-09-11 Tom Stellardradeon/llvm: Assert if we try to encode an unknown...
2012-09-11 Tom Stellardradeon/llvm: Add register encoding for VCC
2012-09-11 Tom Stellardradeon/llvm: Ignore special registers when calculating...
2012-09-11 Tom Stellardradeonsi: Handle position input parameter for pixel...
2012-09-11 Tom Stellardradeon/llvm: Coding style fixes
2012-09-11 Tom Stellardradeonsi: Move interpolation mode check into the compiler
2012-09-11 Tom Stellardradeon/llvm: Add SHADER_TYPE instruction
2012-09-07 Michel Dänzerradeon/llvm: Match fexp2 for SI.
2012-09-06 Michel Dänzerradeon/llvm: Add intrinsic for enabling whole quad...
2012-09-06 Michel Dänzerradeon/llvm: SI shader vector instructions implicitly...
2012-09-06 Michel Dänzerradeon/llvm: Extend SI EXEC register support.
2012-09-06 Tom Stellardradeon/llvm: Remove R600InstrInfo.td from TD_FILES
2012-09-06 Tom Stellardradeon/llvm: Cleanup makefile
2012-09-05 Tom Stellardradeon/llvm: Fix operand ordering for V_CNDMASK_B32
2012-09-05 Tom Stellardradeon/llvm: Use correct float->int conversion opcode...
2012-09-04 Tom Stellardradeon/llvm: Fix lowering of SI_V_CNDLT
2012-09-04 Tom Stellardradeon/llvm: Fix encoding of V_CNDMASK_B32
2012-09-04 Vincent Lejeuneradeon/llvm: do not convert f32 operand of select_cc...
2012-09-04 Vincent Lejeuneradeon/llvm: custom lowering for FP_TO_UINT when dst...
2012-09-04 Vincent Lejeuneradeon/llvm: support setcc on f32
2012-09-04 Vincent Lejeuneradon/llvm: br_cc f32 now lowered without cast
2012-09-04 Vincent Lejeuneradeon/llvm: swap wrong OPCODE_IS_*_ZERO_* opcode and use
2012-09-04 Christian Königradeon/llvm: fix SelectADDR8BitOffset
2012-08-31 Tom Stellardradeon/llvm: Rework how immediate operands are handled...
2012-08-31 Tom Stellardradeon/llvm: Fix typo in assert
2012-08-31 Tom Stellardradeon/llvm: Fix isEG tablegen predicate
2012-08-31 Tom Stellardradeon/llvm: Add support for RCP instruction on SI
2012-08-31 Tom Stellardradeon/llvm: Support AMDGPUfmin DAG node on SI
2012-08-29 Tom Stellardradeon/llvm: Fix encoding of FP immediates on SI
2012-08-29 Tom Stellardradeon/llvm: Create a register class for the M0 register
2012-08-29 Tom Stellardradeon/llvm: Set the neverHasSideEffects bit on more...
2012-08-29 Tom Stellardradeon/llvm: Declare the interpolation intrinsics as...
2012-08-29 Tom Stellardradeon/llvm: Mark M0 as a def when lowering interpolati...
2012-08-28 Michel Dänzerradeon/llvm: Handle TGSI KIL opcode for SI.
2012-08-28 Michel Dänzerradeon/llvm: Basic support for SI EXEC register.
2012-08-27 Michel Dänzerradeonsi: Use FP16 shader export format when necessary...
2012-08-24 Tom Stellardradeon/llvm: Cleanup R600Instructions.td
2012-08-23 Tom Stellardradeon/llvm: Set End of Program bit on RAT instructions
2012-08-23 Tom Stellardradeon/llvm: Use correct instruction for moving immediates
2012-08-23 Tom Stellardradeon/llvm: Fix some coding style issues
2012-08-23 Tom Stellardradeon/llvm: Pull changes from external version of...
2012-08-23 Tom Stellardradeon/llvm: Simplify the convert to ISA pass
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