Revert "Revert "i965/fs: Use align1 mode on ternary instructions on Gen10+""
[mesa.git] / src / intel / compiler / brw_ir_vec4.h
2017-04-14 Samuel Iglesias... i965/vec4: don't do horizontal stride on some register...
2017-04-14 Samuel Iglesias... i965/vec4: split DF instructions and later double its...
2017-03-13 Jason Ekstrandi965: Move the back-end compiler to src/intel/compiler